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<title>u-boot.git/drivers/ram, branch v2020.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>rockchip: rk3308: Add sdram driver</title>
<updated>2019-11-17T09:22:53+00:00</updated>
<author>
<name>Andy Yan</name>
<email>andy.yan@rock-chips.com</email>
</author>
<published>2019-11-14T03:22:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=54069939be63e70027b183654e1f651771e0ca20'/>
<id>54069939be63e70027b183654e1f651771e0ca20</id>
<content type='text'>
A dm based dram driver for rk3308 u-boot
to get capacity.

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
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<pre>
A dm based dram driver for rk3308 u-boot
to get capacity.

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3399: Fix dram setting to make dram more stable</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>YouMin Chen</name>
<email>cym@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bcfacab517e9632040c44ee30e84338b71fa0366'/>
<id>bcfacab517e9632040c44ee30e84338b71fa0366</id>
<content type='text'>
There are some code different with rockchip vendor code which may lead
to different bugs, including:
1) Fix setting error about LPDDR3 dram size ODT.
2) Set phy io speed to 0x2.
3) Fix setting error about phy_pad_fdbk_drive.
4) Fix setting error about PI_WDQLVL_VREF_EN

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are some code different with rockchip vendor code which may lead
to different bugs, including:
1) Fix setting error about LPDDR3 dram size ODT.
2) Set phy io speed to 0x2.
3) Fix setting error about phy_pad_fdbk_drive.
4) Fix setting error about PI_WDQLVL_VREF_EN

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3399: update calculate_stride</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c8863b85083a8f5864f800dee4f22a7dc9f41c9f'/>
<id>c8863b85083a8f5864f800dee4f22a7dc9f41c9f</id>
<content type='text'>
Update the calculation of the stride to support all the DRAM case.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update the calculation of the stride to support all the DRAM case.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3399: Sync the io setting from Rockchip vendor code</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da53f0641b091ba4d45d9068853af81d92fc48b3'/>
<id>da53f0641b091ba4d45d9068853af81d92fc48b3</id>
<content type='text'>
The io setting are updated after some bugfix in different rk3399 boards,
sync the code from vendor.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The io setting are updated after some bugfix in different rk3399 boards,
sync the code from vendor.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rockchip: update lpddr4 timing for rk3399</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7cf04ad1f689c05d5e99c09441d5f6953156e7af'/>
<id>7cf04ad1f689c05d5e99c09441d5f6953156e7af</id>
<content type='text'>
Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip
vendor code;

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip
vendor code;

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3399: add support detect capacity</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>YouMin Chen</name>
<email>cym@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f2b58f0749c34a83096e6a008495428a20a07cad'/>
<id>f2b58f0749c34a83096e6a008495428a20a07cad</id>
<content type='text'>
Add capacity detect for rk3399 so that the driver able to detect the
capacity automatically.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add capacity detect for rk3399 so that the driver able to detect the
capacity automatically.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3399: update the function of sdram_init</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>YouMin Chen</name>
<email>cym@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0cacc27569f31549eeb0bc97dcd77e6654a1e1d4'/>
<id>0cacc27569f31549eeb0bc97dcd77e6654a1e1d4</id>
<content type='text'>
Clean up the sdram_init to keep sync with rockchip source code.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Clean up the sdram_init to keep sync with rockchip source code.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3399: fix error about get_ddrc0_con reg addr</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>YouMin Chen</name>
<email>cym@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=410d7863bc96eaa19d003c303c47f7a8a7492380'/>
<id>410d7863bc96eaa19d003c303c47f7a8a7492380</id>
<content type='text'>
Correct the register to its correct name.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Correct the register to its correct name.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3399: Clean up code</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>YouMin Chen</name>
<email>cym@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f8088bfc85fb63c59726179e5921810829bef021'/>
<id>f8088bfc85fb63c59726179e5921810829bef021</id>
<content type='text'>
Clean up rk3399 dram driver source code for more readable.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Clean up rk3399 dram driver source code for more readable.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3399: migrate to use common code</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>YouMin Chen</name>
<email>cym@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a922d0d102750f287283e33cf364c37f79e1a361'/>
<id>a922d0d102750f287283e33cf364c37f79e1a361</id>
<content type='text'>
For there are some structures and functions are common for all rockchip SoCs,
migrate to use the common code so that we can clean up reduandent codes.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For there are some structures and functions are common for all rockchip SoCs,
migrate to use the common code so that we can clean up reduandent codes.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
