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<title>u-boot.git/drivers/remoteproc, branch v2022.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/remoteproc?h=v2022.01</id>
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<updated>2021-10-05T12:50:15Z</updated>
<entry>
<title>remoteproc: migrate uclass to livetree</title>
<updated>2021-10-05T12:50:15Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@foss.st.com</email>
</author>
<published>2021-09-20T15:56:06Z</published>
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<id>urn:sha1:e2170c29eed7dc542836c7e770037d3d2fe545a0</id>
<content type='text'>
Use dev_ function to read the name and boolean to support a live tree.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>remoteproc: pru: Add support for various PRU cores on K3 AM65x SoCs</title>
<updated>2021-07-15T12:26:04Z</updated>
<author>
<name>Keerthy</name>
<email>j-keerthy@ti.com</email>
</author>
<published>2021-06-22T06:34:28Z</published>
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<id>urn:sha1:02bfcc5c3ad6c3b79e4525763778595f9a60f8b0</id>
<content type='text'>
The K3 AM65x family of SoCs have the next generation of the PRU-ICSS
processor subsystem, commonly referred to as ICSSG. Each ICSSG processor
subsystem on AM65x SR1.0 contains two primary PRU cores and two new
auxiliary PRU cores called RTUs. The AM65x SR2.0 SoCs have a revised
ICSSG IP that is based off the subsequent IP revision used on J721E
SoCs. This IP instance has two new custom auxiliary PRU cores called
Transmit PRUs (Tx_PRUs) in addition to the existing PRUs and RTUs.

Each RTU and Tx_PRU cores have their own dedicated IRAM (smaller than
a PRU), Control and debug feature sets, but is different in terms of
sub-modules integrated around it and does not have the full capabilities
associated with a PRU core. The RTU core is typically used to aid a
PRU core in accelerating data transfers, while the Tx_PRU cores is
normally used to control the TX L2 FIFO if enabled in Ethernet
applications. Both can also be used to run independent applications.
The RTU and Tx_PRU cores though share the same Data RAMs as the PRU
cores, so the memories have to be partitioned carefully between different
applications. The new cores also support a new sub-module called Task
Manager to support two different context thread executions.
The driver currently supports the AM65xx SoC

Signed-off-by: Keerthy &lt;j-keerthy@ti.com&gt;
Signed-off-by: Suman Anna &lt;s-anna@ti.com&gt;
Signed-off-by: Murali Karicheri &lt;m-karicheri2@ti.com&gt;
Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210622063431.3151-3-lokeshvutla@ti.com
</content>
</entry>
<entry>
<title>dm: define LOG_CATEGORY for all uclass</title>
<updated>2021-07-06T16:38:03Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@foss.st.com</email>
</author>
<published>2021-04-27T09:02:19Z</published>
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<id>urn:sha1:b953ec2bca1ebe059366e870eb4bec5e7af9c36b</id>
<content type='text'>
Define LOG_CATEGORY for all uclass to allow filtering with
log command.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>remoteproc: k3-r5: remove sysfw PM calls if not supported</title>
<updated>2021-06-11T11:04:52Z</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2021-06-11T08:45:04Z</published>
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<id>urn:sha1:25805b6f0cf29cbb8db15ae2f0d4801c2f349985</id>
<content type='text'>
With the sysfw rearch, sysfw PM calls are no longer available from SPL
level. To properly support this, remove the is_on checks and the reset
assertion from the R5 remoteproc driver as these are not supported.
Attempting to access unavailable services will cause the device to hang.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Signed-off-by: Tero Kristo &lt;kristo@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch '2021-02-02-drop-asm_global_data-when-unused'</title>
<updated>2021-02-15T15:16:45Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-02-15T13:19:40Z</published>
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<id>urn:sha1:2ae80437fbe0181184ae4b188b89629b902702c6</id>
<content type='text'>
- Merge the patch to take &lt;asm/global_data.h&gt; out of &lt;common.h&gt;
</content>
</entry>
<entry>
<title>remoteproc: k3_r5: Sync to upstreamed kernel DT property names</title>
<updated>2021-02-04T15:07:56Z</updated>
<author>
<name>Suman Anna</name>
<email>s-anna@ti.com</email>
</author>
<published>2021-01-27T00:20:56Z</published>
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<id>urn:sha1:468ec2f3ef8fb4e08c01e6d92a530d3632ca6df5</id>
<content type='text'>
The K3 R5F remoteproc driver in U-Boot was upstreamed prior to the
equivalent remoteproc driver in the Linux kernel. Some of the DT
properties used in U-Boot got upstreamed using different names
in Linux kernel.

The modified property names include the R5F cluster mode configuration
property "lockstep-mode"; and three different individual R5F core config
properties - "atcm-enable", "btcm-enable" and "loczrama". The property
names were updated as follows:
  lockstep-mode =&gt; ti,cluster-mode
  atcm-enable   =&gt; ti,atcm-enable
  btcm-enable   =&gt; ti,btcm-enable
  loczrama      =&gt; ti,loczrama

Update the K3 R5F remoteproc driver, the corresponding binding, and
all the existing usage in AM65x, J721E and J7200 dts files all at
once to use the new properties and to not break any bisectability.

Signed-off-by: Suman Anna &lt;s-anna@ti.com&gt;
</content>
</entry>
<entry>
<title>common: Drop asm/global_data.h from common header</title>
<updated>2021-02-02T20:33:42Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-10-31T03:38:53Z</published>
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<id>urn:sha1:401d1c4f5d2d29c4bc4beaec95402ca23eb63295</id>
<content type='text'>
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include &lt;asm/global_data.h&gt; at all, so
remove that include.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>remoproc: stm32: migrate trace to log macro</title>
<updated>2021-01-13T08:52:58Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2020-11-06T18:01:34Z</published>
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<id>urn:sha1:c886cd6eea1e7671118ff59c3b5a3c7776d4c121</id>
<content type='text'>
Define LOG_CATEGORY and remove unneeded pr_fmt macro with the dev
macro as dev-&gt;name is displayed and CONFIG_LOGF_FUNC can be
activated for log macro.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>remoteproc: ti_k3_arm64: Program CNTFID0 register in GTC</title>
<updated>2021-01-12T05:29:04Z</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2021-01-06T19:20:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ea3f5348063ebe4f41be7d1ba3ef0afe56a04a40'/>
<id>urn:sha1:ea3f5348063ebe4f41be7d1ba3ef0afe56a04a40</id>
<content type='text'>
ARMv8's generic timer[1] picks up it's graycode from GTC. However,
the frequency of the GTC is supposed to be programmed in CNTFID0[2]
register prior to enabling the GTC in CNTCR[3] register.

In K3 architecture, GTC provides a central time to many parts of the
SoC including graycode to the generic timer in the ARMv8 subsystem.
However, due to the central nature and the need to enable the counter
early in the boot process, the R5 based u-boot enables GTC and
programs it's frequency based on central needs of the system. This
may not be a constant 200MHz based on the system. The bootloader is
supposed to program the FID0 register with the correct frequency it
has sourced for GTC from the central system controller OR from PLLs
as appropriate, and TF-A is supposed[4] to use that as the frequency for
it's local timer.

Currently we are programming just the CNTCR[3] register to enable the
GTC, however we dont let TF-A know the frequency that GTC is actually
running at. A mismatch in programmed frequency and what we program for
generic timer will, as we can imagine, all kind of weird mayhem.

So, program the CNTFID0 register with the clock frequency. Note:
assigned-clock-rates should have set the clock frequency, so the only
operation we need to explicitly do is to retrieve the frequency and
program it in FID0 register.

Since the valid in K3 for GTC clock frequencies are &lt; U32_MAX, we can
just cast the ulong and continue.

[1] https://developer.arm.com/documentation/100095/0002/generic-timer/generic-timer-register-summary/aarch64-generic-timer-register-summary
[2] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntfid0
[3] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntcr
[4] https://github.com/ARM-software/arm-trusted-firmware/commit/6a22d9ea3c7fa28d053d3ba264b49b7396a86f9e

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
</entry>
<entry>
<title>dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()</title>
<updated>2021-01-05T19:26:35Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-12-29T03:34:54Z</published>
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<id>urn:sha1:20e442ab2df355450006574fff178c746d254a18</id>
<content type='text'>
The current macro is a misnomer since it does not declare a device
directly. Instead, it declares driver_info record which U-Boot uses at
runtime to create a device.

The distinction seems somewhat minor most of the time, but is becomes
quite confusing when we actually want to declare a device, with
of-platdata. We are left trying to distinguish between a device which
isn't actually device, and a device that is (perhaps an 'instance'?)

It seems better to rename this macro to describe what it actually is. The
macros is not widely used, since boards should use devicetree to declare
devices.

Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is
declaring a new driver_info record, not a device.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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