u-boot.git/drivers/reset/Kconfig, branch master Unnamed repository; edit this file 'description' to name the repository. scmi: Rework SCMI_FIRMWARE implementation 2026-03-23T02:55:01+00:00 Tom Rini trini@konsulko.com 2026-03-17T01:24:14+00:00 80bdc86db5a54730bcc11ce148e25e06f3346553 As exposed by "make randconfig", how we have SCMI_FIRMWARE today is incomplete, and in one case, used incorrectly. First, SCMI_FIRMWARE has a build-time dependency on OF_CONTROL being enabled, so add that. Second, RESET_SCMI depends on SCMI_FIRMWARE being enabled, it should not select that symbol. In turn, a number of platforms need to now enable SCMI_FIRMWARE explicitly and not rely on RESET_SCMI to enable it for them. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Peng Fan <peng.fan@nxp.com> Acked-by: Anshul Dalal <anshuld@ti.com> Acked-by: Michal Simek <michal.simek@amd.com> # Versal Gen 2 Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 
As exposed by "make randconfig", how we have SCMI_FIRMWARE today is
incomplete, and in one case, used incorrectly. First, SCMI_FIRMWARE has
a build-time dependency on OF_CONTROL being enabled, so add that.
Second, RESET_SCMI depends on SCMI_FIRMWARE being enabled, it should not
select that symbol. In turn, a number of platforms need to now enable
SCMI_FIRMWARE explicitly and not rely on RESET_SCMI to enable it for
them.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Anshul Dalal <anshuld@ti.com>
Acked-by: Michal Simek <michal.simek@amd.com> # Versal Gen 2
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
dm: core: Default to using DEVRES outside of xPL 2026-01-09T15:08:14+00:00 Tom Rini trini@konsulko.com 2025-12-27T22:37:11+00:00 217cf656e249f698d390a7d8eaf255eb1a6c0230 The devm alloc functions that we have may follow the Linux kernel model where allocations are (almost always) automatically free()'d. However, quite often we don't enable, in full U-Boot, the tracking and free()'ing functionality. This in turn leads to memory leaks because the driver author expects that since the functions have the same name as in the Linux Kernel they have the same behavior. In turn we then get functionally correct commits such as commit 00e1fed93c8c ("firmware: ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually add these calls. Rather than manually tracking allocations and implementing free()s, rework things so that we follow expectations by enabling the DEVRES functionality (outside of xPL phases). This turns DEVRES from a prompted symbol to a symbol that must be select'd, and we now remove our non-managed alloc/free functions from outside of xPL builds. Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com> 
The devm alloc functions that we have may follow the Linux kernel model
where allocations are (almost always) automatically free()'d. However,
quite often we don't enable, in full U-Boot, the tracking and free()'ing
functionality. This in turn leads to memory leaks because the driver
author expects that since the functions have the same name as in the
Linux Kernel they have the same behavior. In turn we then get
functionally correct commits such as commit 00e1fed93c8c ("firmware:
ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually
add these calls. Rather than manually tracking allocations and
implementing free()s, rework things so that we follow expectations by
enabling the DEVRES functionality (outside of xPL phases).

This turns DEVRES from a prompted symbol to a symbol that must be
select'd, and we now remove our non-managed alloc/free functions from
outside of xPL builds.

Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
reset: Tighten some reset driver dependencies 2025-08-14T16:59:09+00:00 Tom Rini trini@konsulko.com 2025-08-04T21:54:25+00:00 0ae7725e874a65d86ccdc964048940a490185972 A few reset drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <trini@konsulko.com> 
A few reset drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
reset: stm32mp25: add stm32mp25 reset driver 2025-06-11T07:42:55+00:00 Gabriel Fernandez gabriel.fernandez@foss.st.com 2025-05-27T13:27:53+00:00 0994a627c27849f616b6d145508aed6bb8acc33d Implement STM32MP25 reset drivers using stm32-core-reset API. This reset stm32-reset-core API and will be able to use DT binding index started from 0. This patch also moves legacy reset into stm32 directory reset. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> 
Implement STM32MP25 reset drivers using stm32-core-reset API.
This reset stm32-reset-core API and will be able to use DT binding
index started from 0.

This patch also moves legacy reset into stm32 directory reset.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Merge patch series "airoha: Add initial support AN7581" 2025-04-01T14:45:46+00:00 Tom Rini trini@konsulko.com 2025-04-01T14:45:46+00:00 80c61c5ce868a74792609c5ae82eed149154e24c Christian Marangi <ansuelsmth@gmail.com> says: This little series adds initial support for Airoha AN7581 SoC. With the help of some backport patch, this use OF_UPSTREAM directly. Posting this to have the targer and the very basic driver. Ethernet, SNAND and eMMC support is already ready downstream and will be posted shortly after this gets approved. Having the first driver ready permits to separately push dedicate series for SNAND, eMMC and Ethrnet as they all depends on basic support of clock and reset and nothing else. Link: https://lore.kernel.org/r/20250314185941.27834-1-ansuelsmth@gmail.com 
Christian Marangi <ansuelsmth@gmail.com> says:

This little series adds initial support for Airoha AN7581 SoC.

With the help of some backport patch, this use OF_UPSTREAM
directly.

Posting this to have the targer and the very basic driver.

Ethernet, SNAND and eMMC support is already ready downstream
and will be posted shortly after this gets approved.

Having the first driver ready permits to separately push
dedicate series for SNAND, eMMC and Ethrnet as they all depends
on basic support of clock and reset and nothing else.

Link: https://lore.kernel.org/r/20250314185941.27834-1-ansuelsmth@gmail.com
reset: airoha: Add driver for controlling reset line of AN7581 2025-04-01T14:44:51+00:00 Christian Marangi ansuelsmth@gmail.com 2025-03-14T18:59:23+00:00 b02b8b767624a859a2776c11822119392702bbab Add driver for controlling the reset lines of AN7581. This is a detached version of the clock controller driver present in Linux only used to control reset lines. Driver gets loaded with the bind of the clock driver and doesn't require a compatible. This is needed as they share the same registers. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> 
Add driver for controlling the reset lines of AN7581. This is a detached
version of the clock controller driver present in Linux only used to
control reset lines. Driver gets loaded with the bind of the clock
driver and doesn't require a compatible. This is needed as they share
the same registers.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
riscv: reset: k1: Add reset driver 2025-03-25T08:31:40+00:00 Huan Zhou me@per1cycle.org 2025-03-11T01:38:49+00:00 4811c94f836398e884e855cb43da28580a29f8c0 Add spacemit reset driver. Signed-off-by: Huan Zhou <me@per1cycle.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 
Add spacemit reset driver.

Signed-off-by: Huan Zhou <me@per1cycle.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
reset: rzg2l-usbphy-ctrl: Connect up vbus regulator 2025-03-19T02:36:19+00:00 Paul Barker paul.barker.ct@bp.renesas.com 2025-03-11T20:57:45+00:00 e6cc00a56e7d33a43401212065052a6e2a5a8d2b Bind the USB VBUS regulator driver under the USB PHY reset driver for the Renesas RZ/G2L and related SoCs. This additional bind is needed as the corresponding device tree node does not contain a compatible string. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> 
Bind the USB VBUS regulator driver under the USB PHY reset driver for
the Renesas RZ/G2L and related SoCs. This additional bind is needed as
the corresponding device tree node does not contain a compatible string.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
reset: rzg2l-usbphy-ctrl: Add new driver 2025-03-19T02:36:19+00:00 Paul Barker paul.barker.ct@bp.renesas.com 2025-03-11T20:57:43+00:00 b85fe01d7df253a86aa61e0a6ed88971ffe44aac Add a new driver to control the USB 2.0 PHY reset controller on the Renesas RZ/G2L and related SoCs. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> 
Add a new driver to control the USB 2.0 PHY reset controller on the
Renesas RZ/G2L and related SoCs.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
reset: npcm: Add support for Nuvoton NPCM BMC family 2024-01-16T22:05:29+00:00 Jim Liu jim.t90615@gmail.com 2024-01-03T07:29:33+00:00 883a7a982a56b1e121f77b1d30ce880a0164d624 Add reset controller driver for Nuvoton BMCs. The npcm reset driver not only supports reset each module reset but setting initial value of reset Control Registers. And The driver support each module reset. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> 
Add reset controller driver for Nuvoton BMCs.
The npcm reset driver not only supports reset each module reset
but setting initial value of reset Control Registers.

And The driver support each module reset.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>