<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/reset/Makefile, branch v2026.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/reset/Makefile?h=v2026.07</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/reset/Makefile?h=v2026.07'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2026-06-08T13:32:40Z</updated>
<entry>
<title>reset: rockchip: make device resets available in SPL</title>
<updated>2026-06-08T13:32:40Z</updated>
<author>
<name>Alexey Charkov</name>
<email>alchark@flipper.net</email>
</author>
<published>2026-03-11T13:30:58Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1165c206c2fb1b755de42854109d4d6443018305'/>
<id>urn:sha1:1165c206c2fb1b755de42854109d4d6443018305</id>
<content type='text'>
Enable the Rockchip reset controller driver in SPL to allow resetting
attached devices like UFS during early boot.

Reviewed-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Alexey Charkov &lt;alchark@flipper.net&gt;
</content>
</entry>
<entry>
<title>reset: Add RPi5 rescal reset facilities</title>
<updated>2026-06-04T09:50:04Z</updated>
<author>
<name>Torsten Duwe</name>
<email>duwe@suse.de</email>
</author>
<published>2026-06-01T10:39:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=af4f915fd6d2ec9cc024a4d528cebc9c44d15036'/>
<id>urn:sha1:af4f915fd6d2ec9cc024a4d528cebc9c44d15036</id>
<content type='text'>
A driver for Broadcom rescal reset controllers ported from
linux/drivers/reset/reset-brcmstb-rescal.c to U-Boot.

Signed-off-by: Torsten Duwe &lt;duwe@suse.de&gt;
Co-authored-by: Oleksii Moisieiev &lt;oleksii_moisieiev@epam.com&gt;
Tested-by: Pedro Falcato &lt;pfalcato@suse.de&gt;
</content>
</entry>
<entry>
<title>reset: Add RPi5 brcmstb reset facilities</title>
<updated>2026-06-04T09:50:04Z</updated>
<author>
<name>Torsten Duwe</name>
<email>duwe@suse.de</email>
</author>
<published>2026-06-01T10:39:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=64ae1351b5203581a512ad8510e45870fdef4409'/>
<id>urn:sha1:64ae1351b5203581a512ad8510e45870fdef4409</id>
<content type='text'>
A driver for Broadcom reset controllers ported from
linux/drivers/reset/reset-brcmstb.c to U-Boot.

Signed-off-by: Torsten Duwe &lt;duwe@suse.de&gt;
Co-authored-by: Oleksii Moisieiev &lt;oleksii_moisieiev@epam.com&gt;
Tested-by: Pedro Falcato &lt;pfalcato@suse.de&gt;
</content>
</entry>
<entry>
<title>clk: rockchip: Add support for RK3506</title>
<updated>2026-03-10T16:07:03Z</updated>
<author>
<name>Finley Xiao</name>
<email>finley.xiao@rock-chips.com</email>
</author>
<published>2026-01-31T23:38:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fbf72dce915a9bd217ba36e3186b784ed6b55fa7'/>
<id>urn:sha1:fbf72dce915a9bd217ba36e3186b784ed6b55fa7</id>
<content type='text'>
Add clock driver for RK3506.

Imported from vendor U-Boot linux-6.1-stan-rkr6 tag with minor
adjustments and fixes for mainline.

Signed-off-by: Finley Xiao &lt;finley.xiao@rock-chips.com&gt;
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>reset: stm32mp25: add stm32mp25 reset driver</title>
<updated>2025-06-11T07:42:55Z</updated>
<author>
<name>Gabriel Fernandez</name>
<email>gabriel.fernandez@foss.st.com</email>
</author>
<published>2025-05-27T13:27:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0994a627c27849f616b6d145508aed6bb8acc33d'/>
<id>urn:sha1:0994a627c27849f616b6d145508aed6bb8acc33d</id>
<content type='text'>
Implement STM32MP25 reset drivers using stm32-core-reset API.
This reset stm32-reset-core API and will be able to use DT binding
index started from 0.

This patch also moves legacy reset into stm32 directory reset.

Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@foss.st.com&gt;
Signed-off-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Reviewed-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
</entry>
<entry>
<title>reset: rockchip: implement rk3576 lookup table</title>
<updated>2025-04-23T14:12:05Z</updated>
<author>
<name>Elaine Zhang</name>
<email>zhangqing@rock-chips.com</email>
</author>
<published>2025-04-15T21:51:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e4225b22cefeee5556c62c1f1ade5356e637c89c'/>
<id>urn:sha1:e4225b22cefeee5556c62c1f1ade5356e637c89c</id>
<content type='text'>
The current DT bindings for the rk3576 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.

This follows the implementation done in the Linux-Kernel and also
how the rk3588 does this both in the Linux-Kernel as well as U-Boot.

Signed-off-by: Elaine Zhang &lt;zhangqing@rock-chips.com&gt;
[adapted from mainline Linux code for u-boot]
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>clk: rockchip: Add support for RK3528</title>
<updated>2025-04-23T14:12:04Z</updated>
<author>
<name>Joseph Chen</name>
<email>chenjh@rock-chips.com</email>
</author>
<published>2025-04-07T22:46:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5a7a856b132f3cf66f1be05de46e6e5705790a41'/>
<id>urn:sha1:5a7a856b132f3cf66f1be05de46e6e5705790a41</id>
<content type='text'>
Add clock driver for RK3528.

Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with minor
adjustments and fixes for mainline.

Signed-off-by: Joseph Chen &lt;chenjh@rock-chips.com&gt;
Signed-off-by: Finley Xiao &lt;finley.xiao@rock-chips.com&gt;
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "airoha: Add initial support AN7581"</title>
<updated>2025-04-01T14:45:46Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-01T14:45:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=80c61c5ce868a74792609c5ae82eed149154e24c'/>
<id>urn:sha1:80c61c5ce868a74792609c5ae82eed149154e24c</id>
<content type='text'>
Christian Marangi &lt;ansuelsmth@gmail.com&gt; says:

This little series adds initial support for Airoha AN7581 SoC.

With the help of some backport patch, this use OF_UPSTREAM
directly.

Posting this to have the targer and the very basic driver.

Ethernet, SNAND and eMMC support is already ready downstream
and will be posted shortly after this gets approved.

Having the first driver ready permits to separately push
dedicate series for SNAND, eMMC and Ethrnet as they all depends
on basic support of clock and reset and nothing else.

Link: https://lore.kernel.org/r/20250314185941.27834-1-ansuelsmth@gmail.com
</content>
</entry>
<entry>
<title>reset: airoha: Add driver for controlling reset line of AN7581</title>
<updated>2025-04-01T14:44:51Z</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2025-03-14T18:59:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b02b8b767624a859a2776c11822119392702bbab'/>
<id>urn:sha1:b02b8b767624a859a2776c11822119392702bbab</id>
<content type='text'>
Add driver for controlling the reset lines of AN7581. This is a detached
version of the clock controller driver present in Linux only used to
control reset lines. Driver gets loaded with the bind of the clock
driver and doesn't require a compatible. This is needed as they share
the same registers.

Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</content>
</entry>
<entry>
<title>riscv: reset: k1: Add reset driver</title>
<updated>2025-03-25T08:31:40Z</updated>
<author>
<name>Huan Zhou</name>
<email>me@per1cycle.org</email>
</author>
<published>2025-03-11T01:38:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4811c94f836398e884e855cb43da28580a29f8c0'/>
<id>urn:sha1:4811c94f836398e884e855cb43da28580a29f8c0</id>
<content type='text'>
Add spacemit reset driver.

Signed-off-by: Huan Zhou &lt;me@per1cycle.org&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
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