u-boot.git/drivers/reset, branch v2017.11-rc1

dm: reset: add stm32 reset driver

2017-09-22T11:40:01Z

This driver is adapted from linux drivers/reset/reset-stm32.c It's compatible with STM32 F4/F7/H7 SoCs. This driver doesn't implement .of_match as it's binded by MFD RCC driver. To add support for each SoC family, a SoC's specific include/dt-binfings/mfd/stm32xx-rcc.h file must be added. This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs. Other SoCs support will be added in the future. Signed-off-by: Patrice Chotard Reviewed-by: Simon Glass

reset: uniphier: add PXs3 support

2017-08-30T00:07:04Z

Signed-off-by: Masahiro Yamada

reset: uniphier: fix compatible for SD reset node for LD11/LD20

2017-08-30T00:07:04Z

LD20 has SD ctrl instead of MIO ctrl. LD11 has both of them. Signed-off-by: Masahiro Yamada

reset: uniphier: refactor reset data and add NAND/eMMC reset lines

2017-08-20T14:06:20Z

- Merge sys_reset data of LD4, Pro4, sLD8 and Pro5 - Merge sys_reset data of LD11 and LD20 - Use primitive UNIPHIER_RESETX() macro because bit assignments for system reset will be changed for every SoC in the future - Add NAND and eMMC resets Signed-off-by: Masahiro Yamada

ARM: uniphier: remove sLD3 SoC support

2017-08-20T14:05:39Z

This SoC is too old. It is difficult to maintain any longer. Signed-off-by: Masahiro Yamada

reset: add reset_release_all()

2017-07-28T21:34:07Z

Add reset_release_all() method which Assert/Free an array of resets signal that has been previously successfully requested by reset_get_by_*() Signed-off-by: Patrice Chotard Reviewed-by: Simon Glass

reset: add reset_request()

2017-07-28T21:34:06Z

This is needed in error path to assert previously deasserted reset by using a saved reset_ctl reference. Signed-off-by: Patrice Chotard Reviewed-by: Simon Glass

ARM: uniphier: fix various sparse warnings

2017-06-24T21:06:09Z

Fix warnings reported by sparse: - ... was not declared. Should it be static?" - cast to restricted __be32 While fixing those, the type conflict of cci500_init() was found. Signed-off-by: Masahiro Yamada

reset: sti: add deassert counter in reset channel descriptor

2017-06-05T18:13:02Z

This deassert counter allow to manage "shared" reset lines encountered in some specific case. On STiH410 SoC, DWC3, EHCI and OHCI are all using a respective PHY, but all of these PHYs shared a "global" reset. Currently, during command "usb stop", all host controller are stopped (XHCI, EHCI and OHCI). XHCI is first shutdowned, which means that PHY global reset is asserted. Then EHCI is shutdowned, but its PHY reset has already been asserted which make handshake() call failed in ehci_shutdown(). This counter allows to really assert a reset lines only when the "last" user is asserting it. Signed-off-by: Patrice Chotard Reviewed-by: Simon Glass

dm: reset: Update uclass to support livetree

2017-06-01T13:03:15Z

Update the reset domain uclass to support livetree. Fix the xlate() method which has no callers. Signed-off-by: Simon Glass