u-boot.git/drivers/reset, branch v2021.10 Unnamed repository; edit this file 'description' to name the repository. reset: zynqmp: Add reset controller for ZynqMP SoC 2021-08-06T07:32:03+00:00 Michal Simek michal.simek@xilinx.com 2021-07-30T06:00:10+00:00 3f123b74242bc076ba6cae6d45a11bd5da1d977f Add firmware based reset controller for Xilinx ZynqMP SoC to let other drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but support for Xilinx Versal can be simply added. That's why reset_id and nr_reset are assigned in probe folder. Driver is inpired by driver from Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Add firmware based reset controller for Xilinx ZynqMP SoC to let other
drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but
support for Xilinx Versal can be simply added. That's why reset_id and
nr_reset are assigned in probe folder.
Driver is inpired by driver from Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
reset: ast2600: Fix missing reference operator 2021-07-24T12:57:53+00:00 Chia-Wei Wang chiawei_wang@aspeedtech.com 2021-07-20T07:01:36+00:00 bc7b38450baa4efe71bb14ea8aab9e8d206073fd Fix missing reference operator '&' to correctly get HW register addresses for writel(). Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> 
Fix missing reference operator '&' to correctly get
HW register addresses for writel().

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
reset: Avoid a warning in devm_reset_bulk_get_by_node() 2021-07-15T22:42:05+00:00 Simon Glass sjg@chromium.org 2021-05-14T01:39:21+00:00 ca4c24509c60cfc95563d25b482cfed3789aca59 The devres_alloc() function is intended to avoid the need for freeing memory, although in practice it may not be enabled, thus leading to a true leak. Nevertheless this is intended. Add a comment to explain this. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Coverity (CID: 312952) 
The devres_alloc() function is intended to avoid the need for freeing
memory, although in practice it may not be enabled, thus leading to a true
leak.

Nevertheless this is intended. Add a comment to explain this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 312952)
reset: uniphier: Add PCIe reset entry 2021-07-14T20:48:06+00:00 Kunihiko Hayashi hayashi.kunihiko@socionext.com 2021-07-06T10:01:07+00:00 34707b32edad37427327a5358433d0591a07dcc1 Add reset control for PCIe controller on each SoC. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 
Add reset control for PCIe controller on each SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
dm: define LOG_CATEGORY for all uclass 2021-07-06T16:38:03+00:00 Patrick Delaunay patrick.delaunay@foss.st.com 2021-04-27T09:02:19+00:00 b953ec2bca1ebe059366e870eb4bec5e7af9c36b Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
Define LOG_CATEGORY for all uclass to allow filtering with
log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
board: sifive: add HiFive Unmatched board support 2021-05-31T08:35:55+00:00 Green Wan green.wan@sifive.com 2021-05-27T13:52:13+00:00 70415e1e528db0856fedd4fa79b9f4a303a28c62 Add defconfig and board support for HiFive Unmatched. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> 
Add defconfig and board support for HiFive Unmatched.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
drivers: clk: add fu740 support 2021-05-31T08:35:54+00:00 Green Wan green.wan@sifive.com 2021-05-27T13:52:08+00:00 d56d79ed27c658f32f9a4bcae44e789b9c2879aa Add fu740 support. One abstract layer is added for supporting multiple chips such as fu540 and fu740. Signed-off-by: Green Wan <green.wan@sifive.com> 
Add fu740 support. One abstract layer is added for supporting
multiple chips such as fu540 and fu740.

Signed-off-by: Green Wan <green.wan@sifive.com>
reset: stm32: Fix bank and offset computation 2021-05-28T09:24:02+00:00 Patrice Chotard patrice.chotard@foss.st.com 2021-04-28T11:42:45+00:00 6d734be905ef16043471dca6ce5495a905a8590f BITS_PER_LONG is used to represent register's size which is 32. But when compiled on arch64, BITS_PER_LONG is then equal to 64. Fix bank and offset computation to make it work on arch32 and arch64 and ensure that register's size is always equal to 32. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> 
BITS_PER_LONG is used to represent register's size which is 32.
But when compiled on arch64, BITS_PER_LONG is then equal to 64.

Fix bank and offset computation to make it work on arch32 and
arch64 and ensure that register's size is always equal to 32.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
reset: fix reset_get_by_index_nodev index handling 2021-04-27T12:07:21+00:00 Neil Armstrong narmstrong@baylibre.com 2021-04-20T08:42:26+00:00 67e69660781dac57f4a2347e4ae30d97698f245b This fixes an issue getting resets index 1 and 3+, the spurius "> 0" made it return the index 0 or 1, whatever index was passed. The dm_test_reset_base() did not catch it, but the dm_test_reset_base() extension catches it and this fixes the regression. This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was disable even when Linux was booting. Fixes: ea9dc35aab ("reset: Get the RESET by index without device") Reported-by: B1oHazard <ty3uk@mail.ua> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 
This fixes an issue getting resets index 1 and 3+, the spurius "> 0"
made it return the index 0 or 1, whatever index was passed.

The dm_test_reset_base() did not catch it, but the dm_test_reset_base() extension
catches it and this fixes the regression.

This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was disable
even when Linux was booting.

Fixes: ea9dc35aab ("reset: Get the RESET by index without device")
Reported-by: B1oHazard <ty3uk@mail.ua>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
riscv: sifive: Rename fu540 board to unleashed 2021-04-08T07:37:29+00:00 Bin Meng bmeng.cn@gmail.com 2021-03-17T03:10:58+00:00 ae2d9506a36ce2a31b2865c7071e3d20aa633340 In preparation to add SiFive Unmatched board support, let's rename the existing fu540 board to unleashed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 
In preparation to add SiFive Unmatched board support, let's rename
the existing fu540 board to unleashed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>