u-boot.git/drivers/reset, branch v2022.04 Unnamed repository; edit this file 'description' to name the repository. reset: dra7: Add a reset driver 2022-02-08T14:41:27+00:00 Keerthy j-keerthy@ti.com 2022-01-27T12:16:51+00:00 795b2c476f7dd7ecf9de95d8dca8ef0c8657dde4 Add a reset driver to bring IPs out of reset. Signed-off-by: Keerthy <j-keerthy@ti.com> [Amjad: reset_ops structure member "free" has been renamed to "rfree", use the latter instead] Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> 
Add a reset driver to bring IPs out of reset.

Signed-off-by: Keerthy <j-keerthy@ti.com>
[Amjad: reset_ops structure member "free" has been renamed to "rfree",
use the latter instead]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
treewide: invaild -> invalid 2022-01-13T12:57:49+00:00 Sean Anderson seanga2@gmail.com 2021-12-01T19:26:53+00:00 46ad7cef64205806c6383599fbdcd73a631666f0 Somewhere along the way, someone misspelt "invalid" and it got copied everywhere. Fix it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
Somewhere along the way, someone misspelt "invalid" and it got copied
everywhere. Fix it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
reset: scmi: define LOG_CATEGORY 2021-11-23T18:53:03+00:00 Patrick Delaunay patrick.delaunay@foss.st.com 2021-10-28T17:13:12+00:00 d96315411cfca7475cd84e6226ca352ca6b53e9b Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> 
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
clk: sunxi: Move header out of arch directory 2021-10-11T09:46:44+00:00 Samuel Holland samuel@sholland.org 2021-09-12T16:48:43+00:00 21d314a6612564ee202d8a8189ed37d5c6abf0dd The CCU header is only used by the DM drivers, not any platform code. Its current location adds an artificial dependency on CONFIG_ARM and ARCH_SUNXI, which will be problematic when adding the CCU driver for a RISC-V sunxi platform. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> 
The CCU header is only used by the DM drivers, not any platform code.
Its current location adds an artificial dependency on CONFIG_ARM and
ARCH_SUNXI, which will be problematic when adding the CCU driver for
a RISC-V sunxi platform.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
WS cleanup: remove trailing white space 2021-09-30T12:08:56+00:00 Wolfgang Denk wd@denx.de 2021-09-27T15:42:38+00:00 0a50b3c97b3408e52589d873d4c7b54ad365a76c Signed-off-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
WS cleanup: remove trailing empty lines 2021-09-30T12:08:56+00:00 Wolfgang Denk wd@denx.de 2021-09-27T15:42:36+00:00 66356b4c06c934021f6cb58d93877427162b369f Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
reset: zynqmp: Add reset controller for ZynqMP SoC 2021-08-06T07:32:03+00:00 Michal Simek michal.simek@xilinx.com 2021-07-30T06:00:10+00:00 3f123b74242bc076ba6cae6d45a11bd5da1d977f Add firmware based reset controller for Xilinx ZynqMP SoC to let other drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but support for Xilinx Versal can be simply added. That's why reset_id and nr_reset are assigned in probe folder. Driver is inpired by driver from Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Add firmware based reset controller for Xilinx ZynqMP SoC to let other
drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but
support for Xilinx Versal can be simply added. That's why reset_id and
nr_reset are assigned in probe folder.
Driver is inpired by driver from Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
reset: ast2600: Fix missing reference operator 2021-07-24T12:57:53+00:00 Chia-Wei Wang chiawei_wang@aspeedtech.com 2021-07-20T07:01:36+00:00 bc7b38450baa4efe71bb14ea8aab9e8d206073fd Fix missing reference operator '&' to correctly get HW register addresses for writel(). Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> 
Fix missing reference operator '&' to correctly get
HW register addresses for writel().

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
reset: Avoid a warning in devm_reset_bulk_get_by_node() 2021-07-15T22:42:05+00:00 Simon Glass sjg@chromium.org 2021-05-14T01:39:21+00:00 ca4c24509c60cfc95563d25b482cfed3789aca59 The devres_alloc() function is intended to avoid the need for freeing memory, although in practice it may not be enabled, thus leading to a true leak. Nevertheless this is intended. Add a comment to explain this. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Coverity (CID: 312952) 
The devres_alloc() function is intended to avoid the need for freeing
memory, although in practice it may not be enabled, thus leading to a true
leak.

Nevertheless this is intended. Add a comment to explain this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 312952)
reset: uniphier: Add PCIe reset entry 2021-07-14T20:48:06+00:00 Kunihiko Hayashi hayashi.kunihiko@socionext.com 2021-07-06T10:01:07+00:00 34707b32edad37427327a5358433d0591a07dcc1 Add reset control for PCIe controller on each SoC. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 
Add reset control for PCIe controller on each SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>