This allows devm_reset_control_get(dev, NULL) to work and get the first
reset control, which is common in code ported from Linux.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230122000252.53642-2-samuel@sholland.org

Add support for at91 reset controller's basic assert/deassert
operations. Since this driver conflicts with the
SYSRESET driver because they both bind to the same RSTC node,
implement a custom bind hook that would manually bind the
sysreset driver, if enabled, to the same RSTC DT node.
Furthermore, delete the no longer needed compatibles from the
SYSRESET driver and rename it to make sure than any possible
conflicts are avoided.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Tested-by: Mihai Sain <mihai.sain@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

Enable zynqmp reset driver for Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8c26618f87d8451c6ffa9487809a24718bff6a7.1663589964.git.michal.simek@amd.com

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>

Since the base functionality remains the same for a reset driver on Qcom
SoCs, so leverage that to convert ipq4019 specific reset driver to a
generic Qcom reset driver. With that one just need to provide SoC specific
reset table.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>

Add support for versal platform by adding "xlnx,versal-reset"
compatible string in zynqmp-reset driver. Reset numbering schema
for versal is not same as zynqmp, so nr_reset and reset_id are
set to zero. In case of assert/dessert, required device reset id
is sent from respective driver through struct reset_ctl.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

The clock and reset drivers use the exact same platform data. Simplify
them by sharing the object. This is safe because the parent device
(the clock device) always gets its driver model callbacks run first.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

The reason here is the same as the reason for changing the clock driver:
platform data can be provided when binding the driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

This allows all of the clock drivers to use a common bind function.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: add F1C100s support]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>