u-boot.git/drivers/reset, branch v2023.10

reset: mediatek: check malloc return valaue before use

2023-08-03T13:40:49+00:00

This patch add missing return value check for allocating the driver's
private data. -ENOMEM will be returned if malloc() fails.

Signed-off-by: Sam Shih 
Signed-off-by: Weijie Gao

core: read: fix dev_read_addr_size()

2023-07-20T20:10:57+00:00

The behaviour of dev_read_addr_size() is surprising as it does not
handle #address-cells and #size-cells but instead hardcodes the values
based on sizeof(fdt_addr_t).

This is different from dev_read_addr_size_index() and
dev_read_addr_size_name() both of which do read the cell sizes from the
device tree.

Since dev_read_addr_size() is only used by a single driver and this
driver is broken when CONFIG_FDT_64BIT does not match the address size
in the device tree, fix the function to behave like all of the other
similarly named functions.  Drop the property name argument as the only
caller passes "reg" and this is the expected property name matching the
other similarly named functions.

Signed-off-by: John Keeping 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass   # chromebook_jerry
Tested-by: Simon Glass   # chromebook_bob

reset: rockchip: implement rk3588 lookup table

2023-05-17T09:36:18+00:00

The current DT bindings for the rk3588 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.

This approach has been implemented already in Linux, by commit :
f1c506d152ff ("clk: rockchip: add clock controller for the RK3588")

Hence, implement a similar approach using the lookup table, and adapt
the existing reset driver to work with SoCs using lookup table.
The file rst-rk3588.c has been copied as much as possible from Linux.

Adapt the clk rk3588 driver as well to bind the reset driver with the
lookup table.

Reviewed-by: Kever Yang 
Signed-off-by: Eugen Hristev

reset: reset-rockchip: fix trivial line spacing alignment

2023-05-09T10:56:16+00:00

Fix line spacing aligment in bind function

Fixes: 760188c1aa5b ("rockchip: reset: support a (common) rockchip reset drivers")
Signed-off-by: Eugen Hristev 
Reviewed-by: Kever Yang

reset: starfive: jh7110: Add reset driver for StarFive JH7110 SoC

2023-04-20T08:08:44+00:00

Add a DM reset driver for StarFive JH7110 SoC.

Note that the register base address of reset controller is the
same with the clock controller. Therefore, there is no device
tree node alone for reset driver.It binds device node in
the clock driver

Signed-off-by: Yanhong Wang 
Tested-by: Conor Dooley

reset: uniphier: Add USB glue reset support

2023-02-22T18:40:11+00:00

Add reset control support in USB glue logic. This needs to control
the external clocks and resets for the logic before accessing the
glue logic.

The USB dm tree when using dwc3-generic is the following:

   USB glue
     +-- controller       (need controller-reset)
     +-- controller-reset (need syscon-reset)
     +-- phy

The controller needs to deassert "controller-reset" in USB glue before
the controller registers are accessed. The glue needs to deassert
"syscon-reset" before the glue registers are accessed.

The glue itself doesn't have "syscon-reset", so the controller-reset
controls "syscon-reset" instead.

Signed-off-by: Kunihiko Hayashi 
Reviewed-by: Marek Vasut

reset: Allow reset_get_by_name() with NULL name

2023-02-12T18:44:20+00:00

This allows devm_reset_control_get(dev, NULL) to work and get the first
reset control, which is common in code ported from Linux.

Signed-off-by: Samuel Holland 
Reviewed-by: Simon Glass 
Link: https://lore.kernel.org/r/20230122000252.53642-2-samuel@sholland.org

reset: at91: Add reset driver for basic assert/deassert operations

2023-01-05T08:06:35+00:00

Add support for at91 reset controller's basic assert/deassert
operations. Since this driver conflicts with the
SYSRESET driver because they both bind to the same RSTC node,
implement a custom bind hook that would manually bind the
sysreset driver, if enabled, to the same RSTC DT node.
Furthermore, delete the no longer needed compatibles from the
SYSRESET driver and rename it to make sure than any possible
conflicts are avoided.

Signed-off-by: Sergiu Moga 
Tested-by: Mihai Sain 
Reviewed-by: Claudiu Beznea

reset: zynqmp: Enable reset driver for Versal NET

2022-09-26T12:23:29+00:00

Enable zynqmp reset driver for Versal NET.

Signed-off-by: Jay Buddhabhatti 
Signed-off-by: Michal Simek 
Link: https://lore.kernel.org/r/c8c26618f87d8451c6ffa9487809a24718bff6a7.1663589964.git.michal.simek@amd.com

reset: qcom: Add support for QCS404 SoC reset table

2022-08-26T14:55:45+00:00

Signed-off-by: Sumit Garg