u-boot.git/drivers/serial/Kconfig, branch v2018.11

serial: Allow serial to be absent in TPL

2018-10-09T10:40:27Z

At present this option applies to SPL, but it should be available in TPL also, and separately. Change to using CONFIG_IS_ENABLED(), add a new Kconfig option and fix up hang(). Signed-off-by: Simon Glass

sandbox: Add a debug UART

2018-10-09T10:40:27Z

Add support for the debug UART so that sandbox provides build testing for this feature. Signed-off-by: Simon Glass

arm: K3: Add initial support for TI's K3 generation of SoCs

2018-09-11T12:32:55Z

Add support for Texas Instruments' K3 Generation Processor families. Signed-off-by: Lokesh Vutla Reviewed-by: Tom Rini

serial: omap: Introduce DM specific omap serial

2018-09-11T01:19:32Z

Add driver model support for OMAP_SERIAL while reusing the functions in ns16550.c Signed-off-by: Lokesh Vutla Reviewed-by: Tom Rini Tested-by: Derald D. Woods

serial: Add Actions Semi OWL UART support

2018-07-09T19:25:39Z

This commit adds Actions Semi OWL family UART support. This driver relies on baudrate configured by primary bootloaders. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Simon Glass

serial: stm32: Add debug uart support

2018-05-26T22:19:17Z

Add support for early debug printf, before the availability of driver model and device tree support. Signed-off-by: Patrick Delaunay Signed-off-by: Patrice Chotard Reviewed-by: Simon Glass

serial/serial_arc: Implement debug serial

2018-05-24T12:59:17Z

Signed-off-by: Alexey Brodkin

serial: Convert ARC_SERIAL to Kconfig

2018-05-24T12:59:17Z

One step closer to completely Kconfig-driven target configuration in U-Boot :) Signed-off-by: Alexey Brodkin

arm: zynqmp: Add ZynqMP minimal R5 support

2018-05-11T07:38:23Z

Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek

serial: Migrate CONFIG_FSL_LINFLEXUART to Kconfig

2018-04-28T14:42:35Z

Signed-off-by: Tuomas Tynkkynen