u-boot.git/drivers/serial/Makefile, branch v2023.04 Unnamed repository; edit this file 'description' to name the repository. arm: s5p4418: dm_serial: switch to DM_SERIAL 2023-01-02T21:06:08+00:00 Stefan Bosch stefan_b@posteo.net 2022-12-18T12:25:33+00:00 5745de2c9d4beec60ffd6aa74beef9e4ac415ba5 Switch the S5P4418-SOC and therefore the s5p4418_nanopi2 board to DM_SERIAL. Signed-off-by: Stefan Bosch <stefan_b@posteo.net> 
Switch the S5P4418-SOC and therefore the s5p4418_nanopi2 board to
DM_SERIAL.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
kbuild: Remove uncmd_spl logic 2022-12-23T15:15:13+00:00 Tom Rini trini@konsulko.com 2022-12-04T15:14:13+00:00 0478dac62a9add8c73981a900ceaa6da732ae2bb At this point in the conversion there should be no need to have logic to disable some symbol during the SPL build as all symbols should have an SPL counterpart. The main real changes done here are that we now must make proper use of CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we developed prior to CONFIG_IS_ENABLED() being available. Signed-off-by: Tom Rini <trini@konsulko.com> 
At this point in the conversion there should be no need to have logic to
disable some symbol during the SPL build as all symbols should have an
SPL counterpart.

The main real changes done here are that we now must make proper use of
CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we
developed prior to CONFIG_IS_ENABLED() being available.

Signed-off-by: Tom Rini <trini@konsulko.com>
arm: lpc32xx: Remove unused hsuart driver 2022-12-05T21:07:13+00:00 Tom Rini trini@konsulko.com 2022-11-19T23:45:24+00:00 d5596cbc6e4d189e006f0422b162cd12e07c5b97 This driver is not enabled in any config currently, remove it. Cc: Trevor Woerner <twoerner@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> 
This driver is not enabled in any config currently, remove it.

Cc: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Convert CONFIG_SYS_NS16550_MEM32 et al to Kconfig 2022-12-05T21:06:07+00:00 Tom Rini trini@konsulko.com 2022-12-04T14:39:03+00:00 9591b63531fa5a34698ee7bb3800af6c4ea6ba2f This converts the following to Kconfig: CONFIG_SPL_NS16550_MIN_FUNCTIONS CONFIG_SYS_NS16550_MEM32 CONFIG_SYS_NS16550_PORT_MAPPED CONFIG_SYS_NS16550_REG_SIZE CONFIG_SYS_NS16550_SERIAL To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that platforms can enable the legacy driver here for SPL. Signed-off-by: Tom Rini <trini@konsulko.com> 
This converts the following to Kconfig:
   CONFIG_SPL_NS16550_MIN_FUNCTIONS
   CONFIG_SYS_NS16550_MEM32
   CONFIG_SYS_NS16550_PORT_MAPPED
   CONFIG_SYS_NS16550_REG_SIZE
   CONFIG_SYS_NS16550_SERIAL

To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that
platforms can enable the legacy driver here for SPL.

Signed-off-by: Tom Rini <trini@konsulko.com>
arm: Remove PXA architecture support 2022-07-07T13:29:08+00:00 Tom Rini trini@konsulko.com 2022-06-25T15:02:42+00:00 a457ebd78684ba0dba18b1bb5564331f47c180ed With the last platform for this architecture removed, remove the rest of the architecture support as well. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
With the last platform for this architecture removed, remove the rest of
the architecture support as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
serial: npcm: Add support for Nuvoton NPCM SoCs 2022-05-05T13:28:47+00:00 Jim Liu jim.t90615@gmail.com 2022-04-19T05:32:21+00:00 6f6a0b74d65091b302553b16350c32438acddfb7 Add Nuvoton BMC NPCM7xx/NPCM8xx uart driver Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Signed-off-by: Stanley Chu <yschu@nuvoton.com> 
Add Nuvoton BMC NPCM7xx/NPCM8xx uart driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
rockchip: serial: Kconfig: allow ROCKCHIP_SERIAL enabled in TPL 2022-04-18T03:25:13+00:00 Johan Jonker jbx6244@gmail.com 2022-04-09T16:55:14+00:00 9ee6c0766da8bb95c50a12bd774081bcdb0cdedb The serial_rockchip.c driver converts platdata to the data structure used in the ns16550.c file and then calls the function ns16550_serial_probe(). When compiled with OF_REAL the serial_rockchip.c driver returns now -ENODEV when probed and does no harm. The config ROCKCHIP_SERIAL is currently depends on SPL_OF_PLATDATA. Allow serial port use for both SPL and TPL by removing this dependency and SPL_BUILD restriction. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
The serial_rockchip.c driver converts platdata to the data structure
used in the ns16550.c file and then calls the function
ns16550_serial_probe().
When compiled with OF_REAL the serial_rockchip.c driver returns
now -ENODEV when probed and does no harm.
The config ROCKCHIP_SERIAL is currently depends on SPL_OF_PLATDATA.
Allow serial port use for both SPL and TPL by removing this
dependency and SPL_BUILD restriction.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
serial: Add semihosting driver 2022-04-01T19:03:13+00:00 Sean Anderson sean.anderson@seco.com 2022-03-22T20:59:24+00:00 74d11d37e2d33c616748d5572fd5718944826d17 This adds a serial driver which uses semihosting calls to read and write to the host's console. For convenience, if CONFIG_DM_SERIAL is enabled, we will instantiate a serial driver. This allows users to enable this driver (which has no physical device) without modifying their device trees or board files. We also implement a non-DM driver for SPL, or for much faster output in U-Boot proper. There are three ways to print to the console: Method Baud ================== ===== smh_putc in a loop 170 smh_puts 1600 smh_write with :tt 20000 ================== ===== These speeds were measured using a 175 character message with a J-Link adapter. For reference, U-Boot typically prints around 2700 characters during boot on this board. There are two major factors affecting the speed of these functions. First, each breakpoint incurs a delay. Second, each debugger memory transaction incurs a delay. smh_putc has a breakpoint and memory transaction for every character. smh_puts has one breakpoint, but still has to use a transaction for every character. This is because we don't know the length up front, so OpenOCD has to check if each character is nul. smh_write has only one breakpoint and one memory transfer. DM serial drivers can only implement a putc interface, so we are stuck with the slowest API. Non-DM drivers can implement puts, which is vastly more efficient. When the driver starts up, we try to open :tt. Since this is an extension, this may fail. If it does, we fall back to smh_puts. We don't check :semihosting-features, since there are nonconforming implementations (OpenOCD) which don't implement it (but *do* implement :tt). Some semihosting implementations (QEMU) don't handle READC properly. To work around this, we try to use open/read (much like for stdin) if possible. There is no non-blocking I/O available, so we don't implement pending. This will cause __serial_tstc to always return true. If CONFIG_SERIAL_RX_BUFFER is enabled, _serial_tstc will try and read characters forever. To avoid this, we depend on this config being disabled. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
This adds a serial driver which uses semihosting calls to read and write
to the host's console. For convenience, if CONFIG_DM_SERIAL is enabled,
we will instantiate a serial driver. This allows users to enable this
driver (which has no physical device) without modifying their device
trees or board files. We also implement a non-DM driver for SPL, or for
much faster output in U-Boot proper.

There are three ways to print to the console:

Method              Baud
================== =====
smh_putc in a loop   170
smh_puts            1600
smh_write with :tt 20000
================== =====

These speeds were measured using a 175 character message with a J-Link
adapter. For reference, U-Boot typically prints around 2700 characters
during boot on this board. There are two major factors affecting the
speed of these functions. First, each breakpoint incurs a delay. Second,
each debugger memory transaction incurs a delay. smh_putc has a
breakpoint and memory transaction for every character. smh_puts has one
breakpoint, but still has to use a transaction for every character. This
is because we don't know the length up front, so OpenOCD has to check if
each character is nul. smh_write has only one breakpoint and one memory
transfer.

DM serial drivers can only implement a putc interface, so we are stuck
with the slowest API. Non-DM drivers can implement puts, which is vastly
more efficient. When the driver starts up, we try to open :tt. Since
this is an extension, this may fail. If it does, we fall back to
smh_puts. We don't check :semihosting-features, since there are
nonconforming implementations (OpenOCD) which don't implement it (but
*do* implement :tt).

Some semihosting implementations (QEMU) don't handle READC properly. To
work around this, we try to use open/read (much like for stdin) if
possible.

There is no non-blocking I/O available, so we don't implement pending.
This will cause __serial_tstc to always return true. If
CONFIG_SERIAL_RX_BUFFER is enabled, _serial_tstc will try and read
characters forever. To avoid this, we depend on this config being
disabled.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
serial: Add RISC-V HTIF console driver 2022-02-10T03:18:12+00:00 Anup Patel apatel@ventanamicro.com 2022-01-27T06:11:07+00:00 d6ba787e32cff82b6191c59e012ffc01a8e45604 Quite a few RISC-V emulators and ISS (including Spike) have host transfer interface (HTIF) based console. This patch adds HTIF based console driver for RISC-V platforms which depends totally on DT node for HTIF register base address. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> 
Quite a few RISC-V emulators and ISS (including Spike) have host
transfer interface (HTIF) based console. This patch adds HTIF
based console driver for RISC-V platforms which depends totally
on DT node for HTIF register base address.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
serial: qcom: add support for GENI serial driver 2021-10-31T12:46:44+00:00 Dzmitry Sankouski dsankouski@gmail.com 2021-10-17T10:44:27+00:00 324df15a292e938d9341df94e2192a4a465c714e Generic Interface (GENI) Serial Engine (SE) based uart can be found on newer qualcomm SOCs, starting from SDM845. Tested on Samsung SM-G9600(starqltechn) by chain-loading u-boot with stock bootloader. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com> 
Generic Interface (GENI) Serial Engine (SE) based uart
can be found on newer qualcomm SOCs, starting from SDM845.
Tested on Samsung SM-G9600(starqltechn)
by chain-loading u-boot with stock bootloader.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>