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<title>u-boot.git/drivers/serial/serial_intel_mid.c, branch v2017.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>serial: Add serial driver for Intel MID</title>
<updated>2017-04-10T02:02:03+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2017-02-28T12:04:10+00:00</published>
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<id>c5f8dd482b4178cda30be7355085a70521cd4813</id>
<content type='text'>
Add a specific serial driver for Intel MID platforms.

It has special fractional divider which can be programmed via UART_PS,
UART_MUL, and UART_DIV registers.

The UART clock is calculated as

	UART clock = XTAL * UART_MUL / UART_DIV

The baudrate is calculated as

	baud rate = UART clock / UART_PS / DLAB

Initialize fractional divider correctly for Intel Edison platform.

For backward compatibility we have to set initial DLAB value to 16
and speed to 115200 baud, where initial frequency is 29491200Hz, and
XTAL frequency is 38.4MHz.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
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<pre>
Add a specific serial driver for Intel MID platforms.

It has special fractional divider which can be programmed via UART_PS,
UART_MUL, and UART_DIV registers.

The UART clock is calculated as

	UART clock = XTAL * UART_MUL / UART_DIV

The baudrate is calculated as

	baud rate = UART clock / UART_PS / DLAB

Initialize fractional divider correctly for Intel Edison platform.

For backward compatibility we have to set initial DLAB value to 16
and speed to 115200 baud, where initial frequency is 29491200Hz, and
XTAL frequency is 38.4MHz.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
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