<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/serial/serial_sh.c, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>serial: sh: Handle HSCIF on all 64-bit R-Car SoC</title>
<updated>2026-04-08T17:36:28+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-03-15T23:55:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d3c7fb5eb92d5e5f38df49d0cb4edad385d2ff61'/>
<id>d3c7fb5eb92d5e5f38df49d0cb4edad385d2ff61</id>
<content type='text'>
The HSCIF variant present on Renesas R-Car Gen5 SoC is compatible
with the HSCIF variant present on Renesas R-Car Gen4 SoC. Enable
HSSRR register programming for HSCIF present on all 64-bit R-Car
SoCs, which covers R-Car Gen3, Gen4 and newly also Gen5.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The HSCIF variant present on Renesas R-Car Gen5 SoC is compatible
with the HSCIF variant present on Renesas R-Car Gen4 SoC. Enable
HSSRR register programming for HSCIF present on all 64-bit R-Car
SoCs, which covers R-Car Gen3, Gen4 and newly also Gen5.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sh: Handle HSCIF RX FIFO overflow</title>
<updated>2025-10-17T19:53:52+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-09-07T19:16:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=92b779cd9f1493dad467b08e94c916b66270c47c'/>
<id>92b779cd9f1493dad467b08e94c916b66270c47c</id>
<content type='text'>
The HSCIF RX FIFO may overflow when data are streaming from remote end
into the HSCIF while U-Boot is still starting up. In that case, HSFSR
bit RDF is set, but HSFDR field R is zero. This confuses .tstc callback
into considering RX FIFO to be empty, which leads to .getc to be never
invoked, even when user attempts to pass more input onto the command
line.

Fix this by considering the RDF flag in serial_rx_fifo_level(), which
is called from .tstc in case of no errors. If RDF flag is set, trigger
the .getc callback and let it clear the RX FIFO.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The HSCIF RX FIFO may overflow when data are streaming from remote end
into the HSCIF while U-Boot is still starting up. In that case, HSFSR
bit RDF is set, but HSFDR field R is zero. This confuses .tstc callback
into considering RX FIFO to be empty, which leads to .getc to be never
invoked, even when user attempts to pass more input onto the command
line.

Fix this by considering the RDF flag in serial_rx_fifo_level(), which
is called from .tstc in case of no errors. If RDF flag is set, trigger
the .getc callback and let it clear the RX FIFO.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sh: Drop &lt;common.h&gt;</title>
<updated>2023-11-02T10:30:18+00:00</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker.ct@bp.renesas.com</email>
</author>
<published>2023-11-01T20:05:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=56d65db2fbc0b1ab38f112d79847fafb8e41957f'/>
<id>56d65db2fbc0b1ab38f112d79847fafb8e41957f</id>
<content type='text'>
In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sh: Add RZ/G2L SCIF support</title>
<updated>2023-10-19T15:03:20+00:00</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker.ct@bp.renesas.com</email>
</author>
<published>2023-10-19T14:30:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=966caedfa89acaeceb6968f051b7ae26c4c6673f'/>
<id>966caedfa89acaeceb6968f051b7ae26c4c6673f</id>
<content type='text'>
Extend the existing driver to support the SCIF serial ports on the
Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that if
there is a reset signal defined in the device tree, it is de-asserted
before we try to talk to the SCIF module.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Tested-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt; # R-Car H3 Salvator-XS
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Extend the existing driver to support the SCIF serial ports on the
Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that if
there is a reset signal defined in the device tree, it is de-asserted
before we try to talk to the SCIF module.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Tested-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt; # R-Car H3 Salvator-XS
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sh: Fix error handling</title>
<updated>2023-10-19T15:03:15+00:00</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker.ct@bp.renesas.com</email>
</author>
<published>2023-10-19T14:30:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f924d88fa0233abe49cb1c06317f1b486326a90'/>
<id>0f924d88fa0233abe49cb1c06317f1b486326a90</id>
<content type='text'>
The current SCIF error handling is broken for the RZ/G2L. After a break
condition has been triggered, the current code is unable to clear the
error and serial port output never resumes.

The RZ/G2L datasheet says that most error conditions are cleared by
resetting the relevant error bits in the FSR &amp; LSR registers to zero.
To clear framing errors on SCIF ports, the invalid data also needs to be
read out of the receive FIFO.

After reviewing datasheets for RZ/G2{H,M,N,E}, R-Car Gen4, R-Car Gen3
and even SH7751 SoCs, it's clear that this is the way to clear errors
for all of these SoCs.

While we're here, annotate the handle_error() function with a couple of
comments as the reads and writes themselves don't immediately make it
clear what we're doing.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Tested-by: Chris Paterson &lt;chris.paterson2@renesas.com&gt; # HiHope RZ/G2M board
Tested-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt; # R-Car H3 Salvator-XS
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The current SCIF error handling is broken for the RZ/G2L. After a break
condition has been triggered, the current code is unable to clear the
error and serial port output never resumes.

The RZ/G2L datasheet says that most error conditions are cleared by
resetting the relevant error bits in the FSR &amp; LSR registers to zero.
To clear framing errors on SCIF ports, the invalid data also needs to be
read out of the receive FIFO.

After reviewing datasheets for RZ/G2{H,M,N,E}, R-Car Gen4, R-Car Gen3
and even SH7751 SoCs, it's clear that this is the way to clear errors
for all of these SoCs.

While we're here, annotate the handle_error() function with a couple of
comments as the reads and writes themselves don't immediately make it
clear what we're doing.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Tested-by: Chris Paterson &lt;chris.paterson2@renesas.com&gt; # HiHope RZ/G2M board
Tested-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt; # R-Car H3 Salvator-XS
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sh: Sort includes</title>
<updated>2023-10-17T01:27:42+00:00</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker.ct@bp.renesas.com</email>
</author>
<published>2023-10-16T09:25:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ef7ab75676b4199397f6cd5fde8074c144ba5576'/>
<id>ef7ab75676b4199397f6cd5fde8074c144ba5576</id>
<content type='text'>
Tidy up the existing include list before we add more includes in the
following patch.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tidy up the existing include list before we add more includes in the
following patch.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sh: Fix compile error when lacking HSCIF support</title>
<updated>2023-10-16T13:46:17+00:00</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker.ct@bp.renesas.com</email>
</author>
<published>2023-10-16T09:25:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=caf3503c4a2f0c1e7934144c3eacc219aa049e11'/>
<id>caf3503c4a2f0c1e7934144c3eacc219aa049e11</id>
<content type='text'>
If we attempt to compile serial_sh.c for a system which lacks HSCIF
support (e.g. R8A7740), we see the following compilation error:

    In file included from drivers/serial/serial_sh.c:20:
    drivers/serial/serial_sh.c: In function ‘sh_serial_init_generic’:
    drivers/serial/serial_sh.h:429:35: warning: implicit declaration of function ‘sci_HSSRR_out’; did you mean ‘sci_SCSCR_out’? [-Wimplicit-function-declaration]
      429 | #define sci_out(port, reg, value) sci_##reg##_out(port, value)
          |                                   ^~~~
    drivers/serial/serial_sh.c:62:17: note: in expansion of macro ‘sci_out’
       62 |                 sci_out(port, HSSRR, HSSRR_SRE | HSSRR_SRCYC8);
          |                 ^~~~~~~

To fix this, only try to support access to the HSSRR register for SoCs
where it actually exists.

Support for the RZ/G2L will be introduced in following patches, which
selects CONFIG_RCAR_64 but does not have HSCIF interfaces, so check for
CONFIG_RCAR_GEN2 || CONFIG_RCAR_GEN3 || CONFIG_RCAR_GEN4 to determine if
HSCIF is present.

Fixes: bbe36e29ca2c ('serial: sh: Add HSCIF support for R-Car SoC')
Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Cc: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If we attempt to compile serial_sh.c for a system which lacks HSCIF
support (e.g. R8A7740), we see the following compilation error:

    In file included from drivers/serial/serial_sh.c:20:
    drivers/serial/serial_sh.c: In function ‘sh_serial_init_generic’:
    drivers/serial/serial_sh.h:429:35: warning: implicit declaration of function ‘sci_HSSRR_out’; did you mean ‘sci_SCSCR_out’? [-Wimplicit-function-declaration]
      429 | #define sci_out(port, reg, value) sci_##reg##_out(port, value)
          |                                   ^~~~
    drivers/serial/serial_sh.c:62:17: note: in expansion of macro ‘sci_out’
       62 |                 sci_out(port, HSSRR, HSSRR_SRE | HSSRR_SRCYC8);
          |                 ^~~~~~~

To fix this, only try to support access to the HSSRR register for SoCs
where it actually exists.

Support for the RZ/G2L will be introduced in following patches, which
selects CONFIG_RCAR_64 but does not have HSCIF interfaces, so check for
CONFIG_RCAR_GEN2 || CONFIG_RCAR_GEN3 || CONFIG_RCAR_GEN4 to determine if
HSCIF is present.

Fixes: bbe36e29ca2c ('serial: sh: Add HSCIF support for R-Car SoC')
Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Cc: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sh: Add HSCIF support for R-Car SoC</title>
<updated>2023-04-07T15:13:28+00:00</updated>
<author>
<name>Hai Pham</name>
<email>hai.pham.ud@renesas.com</email>
</author>
<published>2023-02-28T21:29:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bbe36e29ca2ce2b3fad0343383038a9ff07dd655'/>
<id>bbe36e29ca2ce2b3fad0343383038a9ff07dd655</id>
<content type='text'>
Provide the basic HSCIF support for R-Car SoC.

Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
[Marek: Fill in HSSRR offset for Gen2 and SCBRR calculation for Gen2 and Gen3]
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Provide the basic HSCIF support for R-Car SoC.

Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
[Marek: Fill in HSSRR offset for Gen2 and SCBRR calculation for Gen2 and Gen3]
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sh: Add DEBUG_UART support</title>
<updated>2023-03-18T11:04:02+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2023-02-28T21:17:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=836d1bfffafb2cd1cdb9f2ee66dd764de223a5eb'/>
<id>836d1bfffafb2cd1cdb9f2ee66dd764de223a5eb</id>
<content type='text'>
Add support for debug output very early during boot using the DEBUG_UART
mechanism. This uses a static fixed UART port configuration selected via
Kconfig options and dedicated print functions from debug_uart.h. This is
useful e.g. when debugging problems so early during boot, that not even
the DM is initialized at that point, and thus DM_SERIAL is not available
either.

This functionality is disabled by default. To activate it, define the
following Kconfig options and select SCIF type using CFG_SCI/CFG_SCIF_A/
CFG_HSCIF/&lt;nothing for regular SCIF&gt;:

CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_SCIF=y
CONFIG_DEBUG_UART_BASE=0xe6540000
CONFIG_DEBUG_UART_CLOCK=24000000

The later two options define the SCIF physical base address and SCIF
input clock in Hz. Optionally, to validate DEBUG_UART works, enable
the following as well to get early serial output message by default:

CONFIG_DEBUG_UART_ANNOUNCE=y

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for debug output very early during boot using the DEBUG_UART
mechanism. This uses a static fixed UART port configuration selected via
Kconfig options and dedicated print functions from debug_uart.h. This is
useful e.g. when debugging problems so early during boot, that not even
the DM is initialized at that point, and thus DM_SERIAL is not available
either.

This functionality is disabled by default. To activate it, define the
following Kconfig options and select SCIF type using CFG_SCI/CFG_SCIF_A/
CFG_HSCIF/&lt;nothing for regular SCIF&gt;:

CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_SCIF=y
CONFIG_DEBUG_UART_BASE=0xe6540000
CONFIG_DEBUG_UART_CLOCK=24000000

The later two options define the SCIF physical base address and SCIF
input clock in Hz. Optionally, to validate DEBUG_UART works, enable
the following as well to get early serial output message by default:

CONFIG_DEBUG_UART_ANNOUNCE=y

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: sh: Rename CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK to CFG_ variants</title>
<updated>2023-03-18T11:04:02+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2023-02-28T21:17:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5e12d7d00b1e8460689e8b9b2d7713630830c43c'/>
<id>5e12d7d00b1e8460689e8b9b2d7713630830c43c</id>
<content type='text'>
Both CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK options do not have a
matching Kconfig entry because they are internal to the SCIF driver.
Change their prefix to CFG_, i.e. CFG_SCIF_USE_EXT_CLK and CFG_SCI,
to reflect that and avoid interferring with Kconfig symbols. Since
neither of those options are defined elsewhere, no functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Both CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK options do not have a
matching Kconfig entry because they are internal to the SCIF driver.
Change their prefix to CFG_, i.e. CFG_SCIF_USE_EXT_CLK and CFG_SCI,
to reflect that and avoid interferring with Kconfig symbols. Since
neither of those options are defined elsewhere, no functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
