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<title>u-boot.git/drivers/serial, branch v2020.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>serial: ns16550: Fix ordering of getting base address</title>
<updated>2020-04-04T14:08:44+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-04-04T01:35:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9e6ce62190b7cd874d2bf727c7681292551ba6b9'/>
<id>9e6ce62190b7cd874d2bf727c7681292551ba6b9</id>
<content type='text'>
Currently the driver gets ns16550 base address in the driver
probe() routine, which may potentially break any ns16550 wrapper
driver that does additional initialization before calling
ns16550_serial_probe().

Things are complicated that we need consider ns16550 devices on
both simple-bus and PCI bus. To fix the issue we move the base
address assignment for simple-bus ns16550 device back to the
ofdata_to_platdata(), and assign base address for PCI ns16550
device in ns16550_serial_probe().

This is still not perfect. If any PCI bus based ns16550 wrapper
driver tries to access plat-&gt;base before calling probe(), it is
still subject to break.

Fixes: 720f9e1fdb0c9 ("serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()")
Reported-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
Tested-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
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<pre>
Currently the driver gets ns16550 base address in the driver
probe() routine, which may potentially break any ns16550 wrapper
driver that does additional initialization before calling
ns16550_serial_probe().

Things are complicated that we need consider ns16550 devices on
both simple-bus and PCI bus. To fix the issue we move the base
address assignment for simple-bus ns16550 device back to the
ofdata_to_platdata(), and assign base address for PCI ns16550
device in ns16550_serial_probe().

This is still not perfect. If any PCI bus based ns16550 wrapper
driver tries to access plat-&gt;base before calling probe(), it is
still subject to break.

Fixes: 720f9e1fdb0c9 ("serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()")
Reported-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
Tested-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: mcfuart: renaming to a more appropriate name</title>
<updated>2020-03-13T13:29:50+00:00</updated>
<author>
<name>Angelo Durgehello</name>
<email>angelo.dureghello@timesys.com</email>
</author>
<published>2020-02-29T00:09:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1886024a0e17a37d86dce622e395e37262d7bc3a'/>
<id>1886024a0e17a37d86dce622e395e37262d7bc3a</id>
<content type='text'>
All drivers seems to align now to serial_xxx maning, so, aligning
also this driver, to allow to be found easily.

Signed-off-by: Angelo Durgehello &lt;angelo.dureghello@timesys.com&gt;
</content>
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<pre>
All drivers seems to align now to serial_xxx maning, so, aligning
also this driver, to allow to be found easily.

Signed-off-by: Angelo Durgehello &lt;angelo.dureghello@timesys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: mcfuart: fix uart port index</title>
<updated>2020-03-13T13:28:17+00:00</updated>
<author>
<name>Angelo Durgehello</name>
<email>angelo.dureghello@timesys.com</email>
</author>
<published>2020-02-29T00:01:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ce5e3ea7995269a49a530284af25cc8cc44bb37d'/>
<id>ce5e3ea7995269a49a530284af25cc8cc44bb37d</id>
<content type='text'>
Actually, using dev-&gt;seq value before probe to deduce the current
serial port index leads to reading an invalid seq value (-1).
So, getting dev-&gt;seq at probe time.

Signed-off-by: Angelo Durgehello &lt;angelo.dureghello@timesys.com&gt;
</content>
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<pre>
Actually, using dev-&gt;seq value before probe to deduce the current
serial port index leads to reading an invalid seq value (-1).
So, getting dev-&gt;seq at probe time.

Signed-off-by: Angelo Durgehello &lt;angelo.dureghello@timesys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial_lpuart: make clock failure less verbose</title>
<updated>2020-03-09T14:06:23+00:00</updated>
<author>
<name>Giulio Benetti</name>
<email>giulio.benetti@benettiengineering.com</email>
</author>
<published>2020-01-31T13:39:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=289dd9f0720dbbefd6092b9388ad60cc42cb358a'/>
<id>289dd9f0720dbbefd6092b9388ad60cc42cb358a</id>
<content type='text'>
Some device may enable CONFIG_CLK but not still support this clock in
CC, so better use debug() in place of dev_warn() otherwise a lot of
boards will throw useless dev_warn()s.

Signed-off-by: Giulio Benetti &lt;giulio.benetti@benettiengineering.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Some device may enable CONFIG_CLK but not still support this clock in
CC, so better use debug() in place of dev_warn() otherwise a lot of
boards will throw useless dev_warn()s.

Signed-off-by: Giulio Benetti &lt;giulio.benetti@benettiengineering.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()</title>
<updated>2020-03-05T10:25:10+00:00</updated>
<author>
<name>Wolfgang Wallner</name>
<email>wolfgang.wallner@br-automation.com</email>
</author>
<published>2020-03-02T13:41:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=720f9e1fdb0c92d3fd16e1bfc25bcbd35612675c'/>
<id>720f9e1fdb0c92d3fd16e1bfc25bcbd35612675c</id>
<content type='text'>
Currently the ofdata_to_platdata() method calls dev_read_addr_pci(),
which potentially accesses the parent PCI bus. If this happens before
the parent PCI bus is probed the resulting address will be wrong.

This behavior was triggered by commit 82de42fa1468 ("dm: core:
Allocate parent data separate from probing parent").

According to a comment in drivers/pci/pci-uclass.c [1] accessing
the PCI parent bus in ofdata_to_platdata() is not allowed, and the
access should be moved to the probe() function.

Move the call to dev_read_addr_pci() and the related handling of the
'addr' value from the ofdata_to_platdata() to its own function,
which is then called from the probe() method.

While moving the code, the comment /* try Processor Local Bus device
first */ was dropped. It was initially added with commit 3db886a5bf38
("serial: ns16550: Support ns16550 compatible pci uart devices") and
later made obsolete with commit 33c215af4b9d ("dm: pci: Add a function
to read a PCI BAR").

[1] Comment in drivers/pci/pci-uclass.c:
"A common cause of this problem is that this function is called in the
ofdata_to_platdata() method of @dev. Accessing the PCI bus in that
method is not allowed, since it has not yet been probed. To fix this,
move that access to the probe() method of @dev instead."

Fixes: 82de42fa1468 ("dm: core: Allocate parent data separate from probing parent")
Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt; # Tested on Intel Galileo
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently the ofdata_to_platdata() method calls dev_read_addr_pci(),
which potentially accesses the parent PCI bus. If this happens before
the parent PCI bus is probed the resulting address will be wrong.

This behavior was triggered by commit 82de42fa1468 ("dm: core:
Allocate parent data separate from probing parent").

According to a comment in drivers/pci/pci-uclass.c [1] accessing
the PCI parent bus in ofdata_to_platdata() is not allowed, and the
access should be moved to the probe() function.

Move the call to dev_read_addr_pci() and the related handling of the
'addr' value from the ofdata_to_platdata() to its own function,
which is then called from the probe() method.

While moving the code, the comment /* try Processor Local Bus device
first */ was dropped. It was initially added with commit 3db886a5bf38
("serial: ns16550: Support ns16550 compatible pci uart devices") and
later made obsolete with commit 33c215af4b9d ("dm: pci: Add a function
to read a PCI BAR").

[1] Comment in drivers/pci/pci-uclass.c:
"A common cause of this problem is that this function is called in the
ofdata_to_platdata() method of @dev. Accessing the PCI bus in that
method is not allowed, since it has not yet been probed. To fix this,
move that access to the probe() method of @dev instead."

Fixes: 82de42fa1468 ("dm: core: Allocate parent data separate from probing parent")
Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt; # Tested on Intel Galileo
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm</title>
<updated>2020-02-11T15:58:41+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-02-11T15:58:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9a8942b53d57149754e0dfc975e0d92d1afd4087'/>
<id>9a8942b53d57149754e0dfc975e0d92d1afd4087</id>
<content type='text'>
sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: serial_cortina: add UART DM driver for CAxxxx SoCs</title>
<updated>2020-02-07T21:16:01+00:00</updated>
<author>
<name>Jason Li</name>
<email>jason.li@cortina-access.com</email>
</author>
<published>2020-01-30T20:34:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0de653d8cfa6eba4a9ffd1fc958a31b2d8818dff'/>
<id>0de653d8cfa6eba4a9ffd1fc958a31b2d8818dff</id>
<content type='text'>
Add serial UART driver support for all Cortina Access
CAxxxx family of SoCs.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Jason Li &lt;jason.li@cortina-access.com&gt;
Signed-off-by: Alex Nemirovsky &lt;alex.nemirovsky@cortina-access.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add serial UART driver support for all Cortina Access
CAxxxx family of SoCs.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Jason Li &lt;jason.li@cortina-access.com&gt;
Signed-off-by: Alex Nemirovsky &lt;alex.nemirovsky@cortina-access.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: core: Create a new header file for 'compat' features</title>
<updated>2020-02-06T02:33:46+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-02-03T14:36:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=336d4615f8fa774557d14f9b3245daa9e5fe3dbc'/>
<id>336d4615f8fa774557d14f9b3245daa9e5fe3dbc</id>
<content type='text'>
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: core: Require users of devres to include the header</title>
<updated>2020-02-06T02:33:46+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-02-03T14:36:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=61b29b82683863a970fd4609a7c58512872616bc'/>
<id>61b29b82683863a970fd4609a7c58512872616bc</id>
<content type='text'>
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: serial: Add a coreboot serial driver</title>
<updated>2020-02-03T17:19:25+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-20T00:58:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=44482e8a2a33835563c17d49dac4004d4da0a7ea'/>
<id>44482e8a2a33835563c17d49dac4004d4da0a7ea</id>
<content type='text'>
Coreboot can provide information about the serial device in use on a
platform. Add a driver that uses this information to produce a working
UART.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Coreboot can provide information about the serial device in use on a
platform. Add a driver that uses this information to produce a working
UART.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
