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<title>u-boot.git/drivers/serial, branch v2021.04-rc3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/serial?h=v2021.04-rc3</id>
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<updated>2021-02-26T12:54:27Z</updated>
<entry>
<title>Merge https://gitlab.denx.de/u-boot/custodians/u-boot-samsung</title>
<updated>2021-02-26T12:54:27Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-02-26T12:54:27Z</published>
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<id>urn:sha1:d9bc92f5548e3325402e9d6c7bce3fb2de079b9b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2021-02-23T15:45:55Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-02-23T15:45:55Z</published>
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<id>urn:sha1:cbe607b920bc0827d8fe379ed4f5ae4e2058513e</id>
<content type='text'>
Xilinx changes for v2021.04-rc3

qspi:
- Support for dual/quad mode
- Fix speed handling

clk:
- Add clock enable function for zynq/zynqmp/versal

gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path

fpga:
- Fix buffer alignment for ZynqMP

xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
</content>
</entry>
<entry>
<title>clk: zynq: Add dummy clock enable function</title>
<updated>2021-02-23T13:56:59Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2021-02-09T14:28:15Z</published>
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<id>urn:sha1:9b7aac75365b68bae2e8f7cf074ba95638d31882</id>
<content type='text'>
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver
doesn't have enable function. Remove this checking from drivers and create
dummy enable function as was done for clk_fixed_rate driver by
commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function").

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>serial: s5p: Allow independent selection</title>
<updated>2021-02-23T06:43:21Z</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2021-02-12T22:22:18Z</published>
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<id>urn:sha1:0d9ff95cd6df6ab25a79eba1ba2f9b81244f48eb</id>
<content type='text'>
Currently support for the Samsung serial port driver is part
of CONFIG_S5P which controls selection of several drivers for
the S5P family.  Give it its own config option such that we
can use it on other SoCs as well.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Patrick Wildt &lt;patrick@blueri.se&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>Merge branch '2021-02-02-drop-asm_global_data-when-unused'</title>
<updated>2021-02-15T15:16:45Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-02-15T13:19:40Z</published>
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<id>urn:sha1:2ae80437fbe0181184ae4b188b89629b902702c6</id>
<content type='text'>
- Merge the patch to take &lt;asm/global_data.h&gt; out of &lt;common.h&gt;
</content>
</entry>
<entry>
<title>arm: Remove mx35pdk board</title>
<updated>2021-02-15T15:11:38Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-02-09T13:03:02Z</published>
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<id>urn:sha1:a1361f458156851de05d40e4dba20ae730646058</id>
<content type='text'>
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>serial: sifive: Cast dev_read_addr() with uintptr_t</title>
<updated>2021-02-03T10:38:41Z</updated>
<author>
<name>Bin Meng</name>
<email>bin.meng@windriver.com</email>
</author>
<published>2021-01-31T12:36:00Z</published>
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<id>urn:sha1:5c7c9e623c5ffdc333ef4876ee800384c60a4955</id>
<content type='text'>
dev_read_addr() returns fdt_addr_t which is now a 64-bit address.
In a 32-bit build, this causes the following warning seen when
building serial_sifive.c:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Cast the return value with uintptr_t.

Signed-off-by: Bin Meng &lt;bin.meng@windriver.com&gt;
</content>
</entry>
<entry>
<title>common: Drop asm/global_data.h from common header</title>
<updated>2021-02-02T20:33:42Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-10-31T03:38:53Z</published>
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<id>urn:sha1:401d1c4f5d2d29c4bc4beaec95402ca23eb63295</id>
<content type='text'>
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include &lt;asm/global_data.h&gt; at all, so
remove that include.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>serial: a3720: Implement pending method for output direction</title>
<updated>2021-01-27T12:12:51Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2021-01-14T14:46:35Z</published>
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<id>urn:sha1:aea2f721051037ea673a726856bcc15ecebf2389</id>
<content type='text'>
To check if some output characters are waiting either in Transmitter
Holding Register or Transmitter Shift Register we need to look at
TX_EMPTY bit of UART Status Register.

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>serial: add uart driver for MediaTek MT7620 SoC</title>
<updated>2021-01-24T20:39:26Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-11-12T08:36:05Z</published>
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<id>urn:sha1:2161f1fcb34762d3b64aeb2e9dcd2b2e809ab272</id>
<content type='text'>
This patch adds uart support for MediaTek MT7620 and earlier SoCs.

The UART used by MT7620 is incompatible with the ns16550a driver.
All registers of this UART have different addresses. A special 16-bit
register for Divisor Latch is used to set the baudrate instead of the
original two 8-bit registers (DLL and DLM).

The driver supports of-platdata which is useful for tiny SPL.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
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