u-boot.git/drivers/serial, branch v2022.10 Unnamed repository; edit this file 'description' to name the repository. usb: gadget: designware-udc: Drop the driver 2022-09-19T15:45:51+00:00 Marek Vasut marex@denx.de 2022-08-23T17:06:50+00:00 c34edb893aca45b81460fc6ce341b4304f08f0f3 This driver is not used by any system and is long unmaintained, drop it. There is a DWC2 OTG driver which is maintained, see CONFIG_USB_GADGET_DWC2_OTG . Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> 
This driver is not used by any system and is long unmaintained, drop it.
There is a DWC2 OTG driver which is maintained, see CONFIG_USB_GADGET_DWC2_OTG .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
serial: mxc: have putc use the TXFIFO 2022-09-18T20:56:10+00:00 Johannes Schneider johannes.schneider@leica-geosystems.com 2022-09-06T12:15:04+00:00 c7878a0483c59c48a730123bc0f4659fd40921bf only waiting for TXEMPTY leads to corrupted messages going over the wire - which is fixed by making use of the FIFO this change is following the linux kernel uart driver (drivers/tty/serial/imx.c), which also checks UTS_TXFULL instead of UTS_TXEMPTY Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de> 
only waiting for TXEMPTY leads to corrupted messages going over the
wire - which is fixed by making use of the FIFO

this change is following the linux kernel uart driver
(drivers/tty/serial/imx.c), which also checks UTS_TXFULL
instead of UTS_TXEMPTY

Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
serial: mxc: enable the RX pipeline 2022-09-18T20:56:10+00:00 Johannes Schneider johannes.schneider@leica-geosystems.com 2022-09-06T12:15:03+00:00 25b7ce32871f94b96385b31e4bd6b1fd830cccd7 on imx8(mm) the RXDMUXSEL needs to be set for data going over the wire (as observable on a connected 'scope) to actually make it into the RXFIFO the reference manual is not overly clear about this, and only mentiones that "UCR3_RXDMUXSEL should always be set." - and since the CR3 register reverts to its reset values after setting the baudrate, setting this bit is done during '_mxc_serial_setbgr' Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de> 
on imx8(mm) the RXDMUXSEL needs to be set for data going over the wire
(as observable on a connected 'scope) to actually make it into the
RXFIFO

the reference manual is not overly clear about this, and only
mentiones that "UCR3_RXDMUXSEL should always be set." - and since the
CR3 register reverts to its reset values after setting the baudrate,
setting this bit is done during '_mxc_serial_setbgr'

Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
serial: zynq: Use DIV_ROUND_CLOSEST() to calcurate divider value 2022-07-26T06:23:55+00:00 Kunihiko Hayashi hayashi.kunihiko@socionext.com 2022-07-13T01:38:59+00:00 c6bceb4e360d704fb9746541c18a1a08f49353fc Since the calulation of "bgen" is rounded down, using a higher baudrate will result in a larger difference from the actual baudrate. Should use DIV_ROUND_CLOSEST() like the Linux driver. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1657676339-6055-1-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Michal Simek <michal.simek@amd.com> 
Since the calulation of "bgen" is rounded down, using a higher
baudrate will result in a larger difference from the actual
baudrate. Should use DIV_ROUND_CLOSEST() like the Linux driver.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1657676339-6055-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
serial: ns16550: Wait in debug_uart_init until tx buffer is empty 2022-07-08T16:20:04+00:00 Pali Rohár pali@kernel.org 2022-06-23T12:13:56+00:00 5e998b4de33fed22da29e3a12e2856f9c00eaebc Commit d293759d55cc ("serial: ns16550: Add support for SPL_DEBUG_UART_BASE") fixed support for setting correct early debug UART base address in SPL. But after this commit, output from Marvell A385 BootROM is truncated or lost and not fully present on serial console. Debugging this issue showed that BootROM just put bytes into UART HW output buffer and does not wait until UART HW transmit all characters. U-Boot ns16550 early debug is initialized very early and during its initialization is resetting UART HW and flushing remaining transmit buffer (which still contains BootROM output). Fix this issue by waiting in init function prior resetting UART HW until TxEmpty bit in UART Line Status Register is set. TxEmpty is set when all remaining bytes from HW buffer are transmitted. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> [trini: Add comment, move ';' to new line per checkpatch.pl] Signed-off-by: Tom Rini <trini@konsulko.com> 
Commit d293759d55cc ("serial: ns16550: Add support for
SPL_DEBUG_UART_BASE") fixed support for setting correct early debug UART
base address in SPL.

But after this commit, output from Marvell A385 BootROM is truncated or
lost and not fully present on serial console.

Debugging this issue showed that BootROM just put bytes into UART HW output
buffer and does not wait until UART HW transmit all characters. U-Boot
ns16550 early debug is initialized very early and during its initialization
is resetting UART HW and flushing remaining transmit buffer (which still
contains BootROM output).

Fix this issue by waiting in init function prior resetting UART HW until
TxEmpty bit in UART Line Status Register is set. TxEmpty is set when all
remaining bytes from HW buffer are transmitted.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Add comment, move ';' to new line per checkpatch.pl]
Signed-off-by: Tom Rini <trini@konsulko.com>
arm: Remove PXA architecture support 2022-07-07T13:29:08+00:00 Tom Rini trini@konsulko.com 2022-06-25T15:02:42+00:00 a457ebd78684ba0dba18b1bb5564331f47c180ed With the last platform for this architecture removed, remove the rest of the architecture support as well. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
With the last platform for this architecture removed, remove the rest of
the architecture support as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next 2022-06-27T14:15:50+00:00 Tom Rini trini@konsulko.com 2022-06-27T14:15:50+00:00 c316ee674f25b73285f241ce922307296616a92a Xilinx changes for v2022.10 cpu: - Add driver for microblaze cpu net: - Add support for DM_ETH_PHY to AXI emac and emaclite xilinx: - Switch platforms to DM_ETH_PHY - DT chagnes in ZynqMP and Zynq - Enable support for SquashFS zynqmp: - Add support for KR260 boards - Move BSS from address 0 - Move platform identification from board code to soc driver - Improve zynqmp_psu_init_minimize versal: - Enable loading app at EL1 serial: - Setup default address and clock rates for DEBUG uarts pinctrl: - Add support for tri state and output enable properties relocate-rela: - Clean relocate-rela implementation for ARM64 - Add support for Microblaze microblaze: - Add support for runtime relocation - Rework cache handling (wiring, Kconfig) based on cpuinfo - Remove interrupt support timer: - Extract axi timer driver from Microblaze to generic location 
Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location
serial: Setup serial base and freq for zynq/zynqmp 2022-06-24T12:11:05+00:00 Michal Simek michal.simek@amd.com 2022-06-06T07:44:01+00:00 ad55d99e3cc3aabdb1c167b7b63e64a26a458225 Setup default values for debug console, base address and frequency. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ce93efd3ed67aa6390810ce0b79e0d00e7c36b4b.1652871485.git.michal.simek@amd.com 
Setup default values for debug console, base address and frequency.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ce93efd3ed67aa6390810ce0b79e0d00e7c36b4b.1652871485.git.michal.simek@amd.com
serial: sandbox: Fix buffer underflow in puts 2022-06-23T16:58:18+00:00 Andrew Scull ascull@google.com 2022-05-30T10:00:01+00:00 337b26e4688720560662246eb7703860b68bd6e2 Fix the buffer underflow that would occur if puts is called with length of zero. Fixes: efa51f2bd64 ("serial: sandbox: Implement puts") Cc: Sean Anderson <sean.anderson@seco.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <sean.anderson@seco.com> 
Fix the buffer underflow that would occur if puts is called with length
of zero.

Fixes: efa51f2bd64 ("serial: sandbox: Implement puts")
Cc: Sean Anderson <sean.anderson@seco.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
serial: Replace CONFIG_DEBUG_UART_BASE by CONFIG_VAL(DEBUG_UART_BASE) 2022-06-06T22:01:21+00:00 Pali Rohár pali@kernel.org 2022-05-27T20:15:24+00:00 b62450cf229c50ad2ce819dd02a09726909cc89a CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards to set different values for SPL, TPL and U-Boot Proper. For ns16550 driver this support is there since commit d293759d55cc ("serial: ns16550: Add support for SPL_DEBUG_UART_BASE"). Signed-off-by: Pali Rohár <pali@kernel.org> 
CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or
CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards
to set different values for SPL, TPL and U-Boot Proper.

For ns16550 driver this support is there since commit d293759d55cc
("serial: ns16550: Add support for SPL_DEBUG_UART_BASE").

Signed-off-by: Pali Rohár <pali@kernel.org>