u-boot.git/drivers/serial, branch v2023.07.01

serial: stm32: BRR must be set only when usart is disable

2023-06-16T09:29:29Z

To avoid spurious chars, BRR register must only be written when USART is disabled. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay

serial: stm32: Wait TC bit before performing initialization

2023-06-16T09:29:29Z

In case there is still chars from previous bootstage to transmit, wait for TC (Transmission Complete) bit to be set which ensure that the last data written in the USART_TDR has been transmitted out of the shift register. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay

serial: meson: fix meson_serial_pending() tx logic

2023-06-07T08:09:20Z

According to the dm_serial_ops documentation, pending() should: > @return number of waiting characters, 0 for none, -ve on error And: > It is acceptable to return 1 if an indeterminant number > of characters is waiting. With the current implementation, we have: * FIFO is full -> pending() returns 0 * FIFO is partially used -> pending() returns 1 * FIFO is empty -> pending() returns 1 This is not the same as what the documentation requires. Moreover, since [1], arm reset now flushes all console devices (including serial) before the cpu gets reset. Because of the flawed logic: => reset # user calls reset flush() is called _serial_flush() is called ops->pending(dev, false) # never returns false # board hangs indefinitely without resetting. Fix it by using AML_UART_TX_EMPTY instead of AML_UART_TX_FULL. [1] commit c5f4cdb8eb60 ("console: Use flush() before panic and reset"), Signed-off-by: Mattijs Korpershoek Acked-by: Neil Armstrong Link: https://lore.kernel.org/r/20230606-fix-meson-serial-pending-v1-1-6a54d4a01f76@baylibre.com Signed-off-by: Neil Armstrong

serial: mxs: Add MXS AUART driver

2023-05-21T14:54:41Z

Add trivial driver for the MXS AUART IP. This is the other UART IP present in i.MX23 and i.MX28, used to drive the non-DUART ports. Signed-off-by: Marek Vasut

x86: Allow locating the UART from ACPI tables

2023-05-11T02:25:29Z

When coreboot does not pass a UART in its sysinfo struct, there is no easy way to find it out. Since coreboot does not actually init the serial device when serial is disabled, it is not possible to make it add this information to the sysinfo table. Add a way to obtain this information from the DBG2 ACPI table, which is normally set up by coreboot. For now this only supports a memory-mapped 16550-style UART. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

Merge tag 'u-boot-rockchip-20230509' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

2023-05-09T16:45:49Z

- Rockchip NFC driver update and dev addr pointer api update; - use standard dr_mode for usb driver; - rock pi boards dts update; - Add rk3566 Anbernic boards; - Misc fixes for drivers;

Merge branch 'for-2023.07-2' of https://source.denx.de/u-boot/custodians/u-boot-mpc8xx

2023-05-07T13:44:27Z

This pull request adds misc fixes for cssi boards and activates CPM relocation in order to enable the use of SCC4 in QMC (QUICC Multi-Channel) mode.

drivers: use dev_read_addr_ptr when cast to pointer

2023-05-06T09:28:18Z

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_ptr instead of the dev_read_addr function in the various files in the drivers directory that cast to a pointer. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass

serial, mpc8xx: Take parameter RAM relocation into account

2023-05-05T05:26:53Z

Instead of inhibiting parameter RAM relacation, take into account the configured one. It means INIT_TRX command cannot be used and must be done manually as explained in the microcode patch application note. Signed-off-by: Christophe Leroy

powerpc: mpc8xx: CPM parameter RAM can be anywhere

2023-05-04T08:58:07Z

With relocation, CPM parameter RAM can be anywhere in the dual port RAM, so don't split dual port RAM. Remove dparam and dparam16 members of struct comm_proc PROFF_XXX become offsets from the start of dual port RAM, then they are now consistant with the offsets in RPBASE registers. Signed-off-by: Christophe Leroy