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<title>u-boot.git/drivers/serial, branch v2025.10-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/serial?h=v2025.10-rc2</id>
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<updated>2025-07-10T11:02:11Z</updated>
<entry>
<title>arm: imx: Remove the rest of i.MX31 support</title>
<updated>2025-07-10T11:02:11Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-07-04T21:46:00Z</published>
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<id>urn:sha1:b284c347252fcc8f2999181b75147008b22eac8d</id>
<content type='text'>
With the removal of the last i.MX31 platform we can remove the rest of
the underlying architecture code as well.

Fixes: f247354708ec ("arm: Remove mx31pdk board")
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>serial: mediatek: enable baudrate accuracy compensation</title>
<updated>2025-06-05T20:30:35Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2025-05-23T09:26:02Z</published>
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<id>urn:sha1:6952209ef220138189dd261d06441e1b2d50e994</id>
<content type='text'>
The high-speed UART from MediaTek supports baudrate accuracy
compensation when using high-speed mode 3.

This is done by calculating the first digit of the fraction part of
sample count value. The fraction value will be then used as the
reference to insert 0 to 10 sample cycle(s) to one frame (assume
that frame format is 8n1, i.e. 10 bits per frame).

The fracdiv_[l/m] registers are used to determine whether a bit in one frame
should be inserted with one sample cycle.

With typical 40MHz source clock, the actual baudrates with/without
accuracy compensation are:

Ideal    w/o compensation w/ compensation
======== ================ ===============
9600     9603             9600
115200   114942           115207
921600   930232           921659
3000000  3076923          3007519

Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>serial: mediatek: fix register names and offsets</title>
<updated>2025-06-05T20:30:35Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2025-05-23T09:25:55Z</published>
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<id>urn:sha1:6e15d3f91aa698798578d39a6d9e292fcc5c577f</id>
<content type='text'>
Fix UART register names and offsets according to the programming
guide to allow implementing some enhanced features.

Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>serial: Setup default base and frequency for Versal platforms</title>
<updated>2025-04-16T11:42:06Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2025-03-13T12:23:46Z</published>
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<id>urn:sha1:b58d34064ca1424132d4d48385a62d987fc169b5</id>
<content type='text'>
Add useful default debug uart values for all Versal platforms to simplify
and speed up debug uart enabling.
The similar change has been done for Zynq/ZynqMP by commit ad55d99e3cc3
("serial: Setup serial base and freq for zynq/zynqmp").

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/86edf3dbb6de16337aac36f5121f306f83149fc0.1741868624.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>Merge patch series "Switch to using $(PHASE_) in Makefiles"</title>
<updated>2025-04-11T18:16:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-11T18:16:49Z</published>
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<id>urn:sha1:407d68638fe32418d61681407effba2a303bb9ee</id>
<content type='text'>
Tom Rini &lt;trini@konsulko.com&gt; says:

This series switches to always using $(PHASE_) in Makefiles when
building rather than $(PHASE_) or $(XPL_). It also starts on documenting
this part of the build, but as a follow-up we need to rename
doc/develop/spl.rst and expand on explaining things a bit.

Link: https://lore.kernel.org/r/20250401225851.1125678-1-trini@konsulko.com
</content>
</entry>
<entry>
<title>Kbuild: Always use $(PHASE_)</title>
<updated>2025-04-11T18:16:44Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-01T22:55:23Z</published>
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<id>urn:sha1:302b41d5397e9f821d360a74335e8821d4513970</id>
<content type='text'>
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "membuff: Add tests and update to support a flag for empty/full"</title>
<updated>2025-04-03T22:54:59Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-03T22:54:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1aa8b03c01f72cefee31039571f2de2f4ccfe0eb'/>
<id>urn:sha1:1aa8b03c01f72cefee31039571f2de2f4ccfe0eb</id>
<content type='text'>
Simon Glass &lt;sjg@chromium.org&gt; says:

The membuff implementation curently has no tests. It also assumes that
head and tail can never correspond unless the buffer is empty.

This series provides a compile-time flag to support a 'full' flag. It
also adds some tests of the main routines.

The data structure is also renamed to membuf which fits better with
U-Boot.

There may be some cases in the code which could be optimised a little,
but the implementation is functional.

Link: https://lore.kernel.org/r/20250318152059.1464369-1-sjg@chromium.org
</content>
</entry>
<entry>
<title>membuff: Rename functions to have membuf_ prefix</title>
<updated>2025-04-03T22:54:49Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-03-18T15:20:42Z</published>
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<id>urn:sha1:4662e5286aa259e158f314157d0d8f2ad213a321</id>
<content type='text'>
The double 'f' is not necessary and is a bit annoying as elsewhere in
U-Boot we use 'buf'. Rename all the functions before it is used more
widely.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>serial: mxc: Support bulk enabling clocks</title>
<updated>2025-03-19T16:17:21Z</updated>
<author>
<name>Adam Ford</name>
<email>aford173@gmail.com</email>
</author>
<published>2025-03-18T23:38:33Z</published>
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<id>urn:sha1:dda454e933c636b225eef325f5f2b815ed01ac2e</id>
<content type='text'>
Depending on the platform, there may be multiple clock sources
required to enable a UART.  Use the bulk functions to get and
enable the clocks when the UART probes.  This can facilitate
the removal of functions to manually enable the clock.

This is made dependent on CLK_CCF which is used on imx6q,
imx8m[mnqp], several imxrt, imx9.  If/when the UART clock
registration is done for older boards, this limitation
could be updated.

Signed-off-by: Adam Ford &lt;aford173@gmail.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>serial: Add missing TPL_SYS_NS16550_SERIAL symbol</title>
<updated>2025-03-18T14:12:18Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-03-04T20:24:36Z</published>
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<id>urn:sha1:0d8b2970a47c914faf13dd1aa97ff7f2070ba8e1</id>
<content type='text'>
On PowerPC platforms with TPL enabled and SPL_SYS_NS16550_SERIAL
enabled, today this builds under TPL as well due to how $(XPL_) is
defined. Add the TPL_SYS_NS16550_SERIAL itself for consistency and
clarity.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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