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<title>u-boot.git/drivers/soc, branch v2025.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>soc: qcom: rpmh-rsc: add back __tcs_set_trigger() for SM8550/SM8650</title>
<updated>2024-09-06T08:47:46+00:00</updated>
<author>
<name>Neil Armstrong</name>
<email>neil.armstrong@linaro.org</email>
</author>
<published>2024-09-03T16:13:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fdbd2fa400f5cb994d7c686cdb665b4c601796d8'/>
<id>fdbd2fa400f5cb994d7c686cdb665b4c601796d8</id>
<content type='text'>
The TCS writes has no effect after the removal of the __tcs_set_trigger()
call, obviously it seems the RSC version 3 requires it to complete the transactions.

Fixes: 80c5be164ad ("soc: qcom: rpmh-rsc: drop unused multi-threading and non-active TCS support")
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Tested-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt; # sm8250 rb5
Reviewed-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
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<pre>
The TCS writes has no effect after the removal of the __tcs_set_trigger()
call, obviously it seems the RSC version 3 requires it to complete the transactions.

Fixes: 80c5be164ad ("soc: qcom: rpmh-rsc: drop unused multi-threading and non-active TCS support")
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Tested-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt; # sm8250 rb5
Reviewed-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: cmd-db: map cmd-db region</title>
<updated>2024-09-06T08:47:46+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2024-08-08T23:59:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a9cbf76e4dd3c3295ed975a14ae4dfb258aefd4b'/>
<id>a9cbf76e4dd3c3295ed975a14ae4dfb258aefd4b</id>
<content type='text'>
On at least SM8650 this region might not be included in the memory map.
Use the new mmu_map_region() helper to map it during bind().

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
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<pre>
On at least SM8650 this region might not be included in the memory map.
Use the new mmu_map_region() helper to map it during bind().

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: cmd-db: use strncmp() instead of memcmp()</title>
<updated>2024-09-06T08:47:46+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2024-08-08T23:59:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=75acc51189117b9c42232d0ea5c75cf72e39a4d8'/>
<id>75acc51189117b9c42232d0ea5c75cf72e39a4d8</id>
<content type='text'>
memcmp() can cause aborts on some platforms and generally seems to be
the wrong approach here. Use strncmp() instead which is more correct.

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
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<pre>
memcmp() can cause aborts on some platforms and generally seems to be
the wrong approach here. Use strncmp() instead which is more correct.

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: ti: k3-navss-ringacc: Fix reconfiguration of qmode API</title>
<updated>2024-08-30T19:57:39+00:00</updated>
<author>
<name>Chintan Vankar</name>
<email>c-vankar@ti.com</email>
</author>
<published>2024-08-26T10:25:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=eedfbb86c259fdc69dbe531da97544fd3e4d7dfe'/>
<id>eedfbb86c259fdc69dbe531da97544fd3e4d7dfe</id>
<content type='text'>
Function "k3_ringacc_ring_reconfig_qmode_raw()" should reset qmode to
requested value and should not update other fields in ring configuration
register.

Signed-off-by: Chintan Vankar &lt;c-vankar@ti.com&gt;
Reviewed-by: Alexander Sverdlin &lt;alexander.sverdlin@siemens.com&gt;
Reviewed-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
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<pre>
Function "k3_ringacc_ring_reconfig_qmode_raw()" should reset qmode to
requested value and should not update other fields in ring configuration
register.

Signed-off-by: Chintan Vankar &lt;c-vankar@ti.com&gt;
Reviewed-by: Alexander Sverdlin &lt;alexander.sverdlin@siemens.com&gt;
Reviewed-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: ti: k3-navss-ringacc: Fix reset ring API</title>
<updated>2024-08-30T19:57:39+00:00</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2024-08-26T10:25:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=963c13d13376e5bb2103556bc61160db12bc31e3'/>
<id>963c13d13376e5bb2103556bc61160db12bc31e3</id>
<content type='text'>
Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to
requested size and not to 0. Fix this.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Chintan Vankar &lt;c-vankar@ti.com&gt;
Reviewed-by: Alexander Sverdlin &lt;alexander.sverdlin@siemens.com&gt;
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<pre>
Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to
requested size and not to 0. Fix this.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Chintan Vankar &lt;c-vankar@ti.com&gt;
Reviewed-by: Alexander Sverdlin &lt;alexander.sverdlin@siemens.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: ti: k3-navss-ringacc: Initialize base address of ring cfg registers</title>
<updated>2024-08-30T19:57:39+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2024-08-26T10:25:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=40710d3388d9998814faaf13da8bfd5220ce56d5'/>
<id>40710d3388d9998814faaf13da8bfd5220ce56d5</id>
<content type='text'>
Initialize base address of ring config registers required to natively
setup ring cfg registers in the absence of Device Manager (DM) services
at R5 SPL stage. Since register property is defined as "ring" for PKTDMA
and "cfg" for UDMA, configure base address of ring configuration register
accordingly.

Reviewed-by: Alexander Sverdlin &lt;alexander.sverdlin@siemens.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Chintan Vankar &lt;c-vankar@ti.com&gt;
</content>
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<pre>
Initialize base address of ring config registers required to natively
setup ring cfg registers in the absence of Device Manager (DM) services
at R5 SPL stage. Since register property is defined as "ring" for PKTDMA
and "cfg" for UDMA, configure base address of ring configuration register
accordingly.

Reviewed-by: Alexander Sverdlin &lt;alexander.sverdlin@siemens.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Signed-off-by: Chintan Vankar &lt;c-vankar@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: zynqmp: Add support for zu1eg_lr device</title>
<updated>2024-08-05T14:14:10+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2024-07-30T14:53:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=81b28310628fdfde5e4cbee7a947dad0fc717eb8'/>
<id>81b28310628fdfde5e4cbee7a947dad0fc717eb8</id>
<content type='text'>
There is new chip coming which is using new _lr suffix that's why record it
in the list to enable bitstream in bit format loading.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/12a939e2c88e82a9828852a8f7f33dfa14a6a4b8.1722351201.git.michal.simek@amd.com
</content>
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<pre>
There is new chip coming which is using new _lr suffix that's why record it
in the list to enable bitstream in bit format loading.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/12a939e2c88e82a9828852a8f7f33dfa14a6a4b8.1722351201.git.michal.simek@amd.com
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: add build infrastructure</title>
<updated>2024-07-25T23:28:11+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2024-07-15T10:08:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1384436dd8d720128b82d5619d9401584c380cb6'/>
<id>1384436dd8d720128b82d5619d9401584c380cb6</id>
<content type='text'>
Add Kconfig / Makefiles to build rpmh and cmd-db drivers.

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
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<pre>
Add Kconfig / Makefiles to build rpmh and cmd-db drivers.

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: rpmh: U-Boot API changes</title>
<updated>2024-07-25T23:28:11+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2024-07-15T10:08:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c6112dd2470d3cfe939f7ccc8c617025fbe5636c'/>
<id>c6112dd2470d3cfe939f7ccc8c617025fbe5636c</id>
<content type='text'>
Fix build errors, add some debug logging.

Acked-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
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<pre>
Fix build errors, add some debug logging.

Acked-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: rpmh: drop unused functions</title>
<updated>2024-07-25T23:28:11+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2024-07-15T10:08:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a726ea1140d82bae5ccee11619157313b8c80953'/>
<id>a726ea1140d82bae5ccee11619157313b8c80953</id>
<content type='text'>
A lot of the features in here are only relevant when running
multi-threaded with interrupts. Drop everything except what we need to
run single-threaded with a single TCS (which is all the rpmh-rsc
framework in U-Boot supports).

Keep rpmh_write_async() for simplicity and make it wrap the regular
rpmh_write().

Acked-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
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<pre>
A lot of the features in here are only relevant when running
multi-threaded with interrupts. Drop everything except what we need to
run single-threaded with a single TCS (which is all the rpmh-rsc
framework in U-Boot supports).

Keep rpmh_write_async() for simplicity and make it wrap the regular
rpmh_write().

Acked-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
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