<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/spi/Makefile, branch v2015.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/spi/Makefile?h=v2015.04</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/spi/Makefile?h=v2015.04'/>
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<updated>2015-04-10T12:23:20Z</updated>
<entry>
<title>lpc32xx: add LPC32xx SSP support (SPI mode)</title>
<updated>2015-04-10T12:23:20Z</updated>
<author>
<name>Albert ARIBAUD \(3ADEV\)</name>
<email>albert.aribaud@3adev.fr</email>
</author>
<published>2015-03-31T09:40:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=981219eebe3cc29f155a37951788c18786260514'/>
<id>urn:sha1:981219eebe3cc29f155a37951788c18786260514</id>
<content type='text'>
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</content>
</entry>
<entry>
<title>spi: Add designware master SPI DM driver used on SoCFPGA</title>
<updated>2014-12-06T12:52:47Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2014-11-07T12:50:31Z</published>
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<id>urn:sha1:5bef6fd79f9442269c6a0d3778cb65c7a71e4d9a</id>
<content type='text'>
This patch adds the driver for the Designware master SPI controller. This
IP core is integrated on the Altera SoCFPGA. This implementation is a
driver model (DM) implementation. So multiple SPI drivers can be used.
Thats necessary, since SoCFPGA also integrates the Cadence QSPI controller
used to connect the SPI NOR flashes. Without DM, using multiple SPI
drivers is not possible.

This driver is very loosely based on the Linux driver. Most of the Linux
driver is removed. Only the polling loop for the transfer is really used
from this driver, as we don't support interrupts and DMA right now.

This is tested on the SoCrates SoCFPGA board using the SPI pins on the
P14 header.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Vince Bridgers &lt;vbridger@altera.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>spi: Add Cadence QSPI DM driver used by SoCFPGA</title>
<updated>2014-12-06T12:52:46Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2014-11-07T11:37:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=10e8bf88c0c9ffc0af1011c7a790e792cbc67451'/>
<id>urn:sha1:10e8bf88c0c9ffc0af1011c7a790e792cbc67451</id>
<content type='text'>
This driver is cloned from the Altera Rockerboard.org U-Boot
repository. I used this git tag: ACDS14.0.1_REL_GSRD_RC2. With Some
modification to support the U-Boot driver model (DM).

As mentioned above, in this new version I ported this driver to the
new driver model (DM). One big advantage of this move is that now
multiple SPI drivers can be enabled on one platform. And since the
SoCFPGA also has the Designware SPI master controller integrated,
this feature is really needed to support both controllers.

Because of this, this series needs the DT support for SoCFPGA
to be applied. For DT based probing in the SPI DM.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Vince Bridgers &lt;vbridger@altera.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>dm: tegra: spi: Convert to driver model</title>
<updated>2014-10-22T16:36:52Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-14T05:42:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fda6fac39bb915fdb0ff31b998336d3a5f5c71a9'/>
<id>urn:sha1:fda6fac39bb915fdb0ff31b998336d3a5f5c71a9</id>
<content type='text'>
This converts the Tegra SPI drivers to use driver model. This is tested
on:

- Tegra20 - trimslice
- Tegra30 - beaver
- Tegra124 - dalmore

(not tested on Tegra124)

Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: spi: Add soft_spi implementation</title>
<updated>2014-10-22T16:36:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-14T05:42:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=623b638607aa00dad85cee36e229011c79b249ce'/>
<id>urn:sha1:623b638607aa00dad85cee36e229011c79b249ce</id>
<content type='text'>
Add a new implementation of soft_spi that uses device tree to specify the
GPIOs. This will replace soft_spi_legacy for boards which use driver model.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>dm: spi: Rename soft_spi.c to soft_spi_legacy.c</title>
<updated>2014-10-22T16:36:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-14T05:41:58Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a666f39e4edc2eb6296d7401aab2706d6ae7f459'/>
<id>urn:sha1:a666f39e4edc2eb6296d7401aab2706d6ae7f459</id>
<content type='text'>
Reserve the 'normal' name for use by driver model, and rename the old
driver so that it is clear that it is for 'legacy' drivers only.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>dm: sandbox: Add a SPI emulation uclass</title>
<updated>2014-10-22T16:36:46Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-14T05:41:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c60e1f254747ac650f8290e5debcf8ad1567584b'/>
<id>urn:sha1:c60e1f254747ac650f8290e5debcf8ad1567584b</id>
<content type='text'>
U-Boot includes a SPI emulation driver already but it is not explicit, and
is hidden in the SPI flash code.

Conceptually with sandbox's SPI implementation we have a layer which
creates SPI bus transitions and a layer which interprets them, currently
only for SPI flash. The latter is actually an emulation, and it should be
possible to add more than one emulation - not just SPI flash.

Add a SPI emulation uclass so that other emulations can be plugged in to
support different types of emulated devices on difference buses/chip
selects.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>dm: spi: Add a uclass for SPI</title>
<updated>2014-10-22T16:36:46Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-14T05:41:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d7af6a485126a0d08a0a9a56721e42a3e78b5b53'/>
<id>urn:sha1:d7af6a485126a0d08a0a9a56721e42a3e78b5b53</id>
<content type='text'>
Add a uclass which provides access to SPI buses and includes operations
required by SPI.

For a time driver model will need to co-exist with the legacy SPI interface
so some parts of the header file are changed depending on which is in use.
The exports are adjusted also since some functions are not available with
driver model.

Boards must define CONFIG_DM_SPI to use driver model for SPI.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
(Discussed some follow-up comments which will address in future add-ons)
</content>
</entry>
<entry>
<title>arm: ep9315: Return back Cirrus Logic EDB9315A board support</title>
<updated>2014-07-04T21:45:48Z</updated>
<author>
<name>Sergey Kostanbaev</name>
<email>sergey.kostanbaev@gmail.com</email>
</author>
<published>2014-06-25T19:44:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7237d22baac9ebeffc946dfd30b9f61aaf0bfdbc'/>
<id>urn:sha1:7237d22baac9ebeffc946dfd30b9f61aaf0bfdbc</id>
<content type='text'>
This patch returns back support for old ep93xx processors family

Signed-off-by: Sergey Kostanbaev &lt;sergey.kostanbaev@gmail.com&gt;
Cc: albert.u.boot@aribaud.net
</content>
</entry>
<entry>
<title>arm: vf610: Add QSPI driver support</title>
<updated>2014-06-09T07:18:09Z</updated>
<author>
<name>Alison Wang</name>
<email>b18965@freescale.com</email>
</author>
<published>2014-05-06T01:13:01Z</published>
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<id>urn:sha1:6b57ff6fd5111840dd4787f3d08596076e752676</id>
<content type='text'>
Add Freescale QSPI driver support for VF610.

Signed-off-by: Alison Wang &lt;Huan.Wang@freescale.com&gt;
Signed-off-by: Chao Fu &lt;b44548@freescale.com&gt;
</content>
</entry>
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