u-boot.git/drivers/spi/Makefile, branch v2015.07

spi: Makefile: Use object file alphabetic order

2015-07-01T16:09:04Z

Use object files as incresing alphabetic order, so-that it's easy for readability. Signed-off-by: Jagan Teki

spi: Zap oc_tiny_spi driver

2015-07-01T15:45:02Z

Zap oc_tiny_spi driver since the boards used this driver is no longer been active. Signed-off-by: Jagan Teki Cc: Thomas Chou

spi: Zap ftssp010_spi driver

2015-07-01T15:45:02Z

Zap ftssp010_spi driver since the boards used this driver is no longer been active. Signed-off-by: Jagan Teki Cc: Kuo-Jung Su Cc: Axel Lin

spi: Zap andes_spi driver

2015-07-01T15:45:02Z

Zap andes_spi driver since the boards used this driver is no longer been active. Signed-off-by: Jagan Teki Cc: Macpaul Lin

dm: spi: Convert Freescale DSPI driver to driver model

2015-04-18T17:11:18Z

Move the Freescale DSPI driver over to driver model. Signed-off-by: Haikun Wang Acked-by: Simon Glass

lpc32xx: add LPC32xx SSP support (SPI mode)

2015-04-10T12:23:20Z

Reviewed-by: Jagannadha Sutradharudu Teki Signed-off-by: Albert ARIBAUD (3ADEV)

spi: Add designware master SPI DM driver used on SoCFPGA

2014-12-06T12:52:47Z

This patch adds the driver for the Designware master SPI controller. This IP core is integrated on the Altera SoCFPGA. This implementation is a driver model (DM) implementation. So multiple SPI drivers can be used. Thats necessary, since SoCFPGA also integrates the Cadence QSPI controller used to connect the SPI NOR flashes. Without DM, using multiple SPI drivers is not possible. This driver is very loosely based on the Linux driver. Most of the Linux driver is removed. Only the polling loop for the transfer is really used from this driver, as we don't support interrupts and DMA right now. This is tested on the SoCrates SoCFPGA board using the SPI pins on the P14 header. Signed-off-by: Stefan Roese Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Marek Vasut Cc: Pavel Machek Reviewed-by: Simon Glass Cc: Jagannadha Sutradharudu Teki

spi: Add Cadence QSPI DM driver used by SoCFPGA

2014-12-06T12:52:46Z

This driver is cloned from the Altera Rockerboard.org U-Boot repository. I used this git tag: ACDS14.0.1_REL_GSRD_RC2. With Some modification to support the U-Boot driver model (DM). As mentioned above, in this new version I ported this driver to the new driver model (DM). One big advantage of this move is that now multiple SPI drivers can be enabled on one platform. And since the SoCFPGA also has the Designware SPI master controller integrated, this feature is really needed to support both controllers. Because of this, this series needs the DT support for SoCFPGA to be applied. For DT based probing in the SPI DM. Signed-off-by: Stefan Roese Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Marek Vasut Cc: Pavel Machek Cc: Simon Glass Cc: Jagannadha Sutradharudu Teki

dm: tegra: spi: Convert to driver model

2014-10-22T16:36:52Z

This converts the Tegra SPI drivers to use driver model. This is tested on: - Tegra20 - trimslice - Tegra30 - beaver - Tegra124 - dalmore (not tested on Tegra124) Reviewed-by: Jagannadha Sutradharudu Teki Signed-off-by: Simon Glass

dm: spi: Add soft_spi implementation

2014-10-22T16:36:48Z

Add a new implementation of soft_spi that uses device tree to specify the GPIOs. This will replace soft_spi_legacy for boards which use driver model. Signed-off-by: Simon Glass Reviewed-by: Jagannadha Sutradharudu Teki