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<title>u-boot.git/drivers/spi/Makefile, branch v2017.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/spi/Makefile?h=v2017.09</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/spi/Makefile?h=v2017.09'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-07-08T19:56:03Z</updated>
<entry>
<title>powerpc, 8xx: move SPI driver to drivers/spi/</title>
<updated>2017-07-08T19:56:03Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2017-07-06T08:33:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f88c431b8a264872e9391e039541792a13a5076a'/>
<id>urn:sha1:f88c431b8a264872e9391e039541792a13a5076a</id>
<content type='text'>
Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
</content>
</entry>
<entry>
<title>Blackfin: Remove</title>
<updated>2017-04-05T17:52:01Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-03-14T15:08:10Z</published>
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<id>urn:sha1:ea3310e8aafad1da72d9a5e60568d725cbdefdbd</id>
<content type='text'>
The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews &lt;mben12@gmail.com&gt;
Cc: Chong Huang &lt;chuang@ucrobotics.com&gt;
Cc: Dimitar Penev &lt;dpn@switchfin.org&gt;
Cc: Haitao Zhang &lt;hzhang@ucrobotics.com&gt;
Cc: I-SYST Micromodule &lt;support@i-syst.com&gt;
Cc: M.Hasewinkel (MHA) &lt;info@ssv-embedded.de&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Martin Strubel &lt;strubel@section5.ch&gt;
Cc: Peter Meerwald &lt;devel@bct-electronic.com&gt;
Cc: Sonic Zhang &lt;sonic.adi@gmail.com&gt;
Cc: Valentin Yakovenkov &lt;yakovenkov@niistt.ru&gt;
Cc: Wojtek Skulski &lt;info@skutek.com&gt;
Cc: Wojtek Skulski &lt;skulski@pas.rochester.edu&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>ARM: SPI: stm32: add stm32f746 qspi driver</title>
<updated>2017-01-28T19:04:50Z</updated>
<author>
<name>Michael Kurz</name>
<email>michi.kurz@gmail.com</email>
</author>
<published>2017-01-22T15:04:30Z</published>
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<id>urn:sha1:d4363baada1505e126fc75c292f17903ab9c9e3a</id>
<content type='text'>
This patch adds support for the QSPI IP found in stm32f7 devices.

Signed-off-by: Michael Kurz &lt;michi.kurz@gmail.com&gt;
</content>
</entry>
<entry>
<title>spi: Zap cf_qspi driver and related code</title>
<updated>2017-01-15T17:29:04Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@openedev.com</email>
</author>
<published>2017-01-02T22:29:04Z</published>
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<id>urn:sha1:68e7999ba9de0a15dd3dc99e078b70f41eb98c82</id>
<content type='text'>
Dropped becuase
- driver not used any board.
- no dm conversion.

Cc: Angelo Dureghello &lt;angelo@sysam.it&gt;
Cc: Richard Retanubun &lt;richardretanubun@ruggedcom.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@openedev.com&gt;
Acked-by: Angelo Dureghello &lt;angelo@sysam.it&gt;
</content>
</entry>
<entry>
<title>spi: Zap ep93xx_spi driver and related code</title>
<updated>2017-01-13T21:47:14Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@openedev.com</email>
</author>
<published>2017-01-02T22:29:03Z</published>
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<id>urn:sha1:ee86e0d2fe071aac37f6a02e924841f981b24121</id>
<content type='text'>
Dropped becuase
- driver and related configs not used any board.
- no dm conversion.

Cc: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Sergey Kostanbaev &lt;sergey.kostanbaev@gmail.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>spi: Zap armada100_spi.c and env</title>
<updated>2016-12-21T11:18:47Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@openedev.com</email>
</author>
<published>2016-11-24T19:28:58Z</published>
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<id>urn:sha1:cb71c6d85409715f541261f0bdda4a8060128689</id>
<content type='text'>
armada100_spi.c and related env is zapping becuase
of "no DM conversion".

Cc: Ajay Bhargav &lt;ajay.bhargav@einfochips.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>spi: Zap mpc52xx_spi.c, config and related code</title>
<updated>2016-12-21T11:14:37Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@openedev.com</email>
</author>
<published>2016-12-15T16:36:47Z</published>
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<id>urn:sha1:353f6a770f2ab50bdc38081e29e5ec5f586a05db</id>
<content type='text'>
armada100_spi.c, related config options and related codes
are zapping becuase of "no DM conversion".

Cc: Werner Pfister &lt;Pfister_Werner@intercontrol.de&gt;
Signed-off-by: Jagan Teki &lt;jagan@openedev.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>spi: Add driver for Marvell Armada 3700 SoC</title>
<updated>2016-09-27T15:29:52Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-05-19T13:56:44Z</published>
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<id>urn:sha1:3fda4ef39557c070558d51c4ea4562c370c3f96d</id>
<content type='text'>
The SPI IP core in the Marvell Armada 3700 is similar to the one in the
other Armada SoCs. But the differences are big enough that it makes
sense to introduce a new driver instead of cluttering the old
kirkwood driver with #ifdef's.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Nadav Haklai &lt;nadavh@marvell.com&gt;
Cc: Kostya Porotchkin &lt;kostap@marvell.com&gt;
Cc: Wilson Ding &lt;dingwei@marvell.com&gt;
Cc: Victor Gu &lt;xigu@marvell.com&gt;
Cc: Hua Jing &lt;jinghua@marvell.com&gt;
Cc: Terry Zhou &lt;bjzhou@marvell.com&gt;
Cc: Hanna Hawa &lt;hannah@marvell.com&gt;
Cc: Haim Boot &lt;hayim@marvell.com&gt;
Reviewed-by: Jagan Teki &lt;jteki@openedev.com&gt;
</content>
</entry>
<entry>
<title>spi: pic32_spi: add SPI master driver for PIC32 SoC.</title>
<updated>2016-06-10T10:31:12Z</updated>
<author>
<name>Purna Chandra Mandal</name>
<email>purna.mandal@microchip.com</email>
</author>
<published>2016-06-02T08:56:08Z</published>
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<id>urn:sha1:e19b9004575cacf1f64fff894621adafe0e7ea7f</id>
<content type='text'>
This driver implements SPI protocol in master mode to communicate
with the SPI device connected on SPI bus. It handles /CS explicitly
by controlling respective pin as gpio ('cs-gpios' property in dt node)
and uses PIO mode for SPI transaction. It is configurable based
on driver-model only.

Cc: Jagan Teki &lt;jteki@openedev.com&gt;
Signed-off-by: Purna Chandra Mandal &lt;purna.mandal@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>drivers: spi: add spi support for QCA/Atheros ath79 SOCs</title>
<updated>2016-05-20T23:25:50Z</updated>
<author>
<name>Wills Wang</name>
<email>wills.wang@live.com</email>
</author>
<published>2016-03-16T08:59:58Z</published>
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<id>urn:sha1:b85dc4607268ffc49af642ab702d44c8b5ef3719</id>
<content type='text'>
This patch add a compatible spi driver for ath79 series SOC.

Signed-off-by: Wills Wang &lt;wills.wang@live.com&gt;
Reviewed-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
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