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<title>u-boot.git/drivers/spi/ich.h, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>x86: spl: Move priv/plat structs to headers</title>
<updated>2021-01-05T19:24:41+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-12-19T17:39:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a53f6fad7ea20f6ccde21f68e3b44ab7fe8bf6cd'/>
<id>a53f6fad7ea20f6ccde21f68e3b44ab7fe8bf6cd</id>
<content type='text'>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>common: Drop linux/bitops.h from common header</title>
<updated>2020-05-19T01:19:23+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-05-10T17:40:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cd93d625fd751d55c729c78b10f82109d56a5f1d'/>
<id>cd93d625fd751d55c729c78b10f82109d56a5f1d</id>
<content type='text'>
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: ich: Add Apollo Lake support</title>
<updated>2019-12-15T03:44:24+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-07T04:42:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3937df3d6c0b88745399434c58d80960f7bf31af'/>
<id>3937df3d6c0b88745399434c58d80960f7bf31af</id>
<content type='text'>
Add support for Apollo Lake to the ICH driver. This involves adjusting the
mmio address and skipping setting of the bbar.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for Apollo Lake to the ICH driver. This involves adjusting the
mmio address and skipping setting of the bbar.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: ich: Support hardware sequencing</title>
<updated>2019-12-15T03:44:23+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-07T04:42:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1facebd18fd7369e7629bce1d4fe78d5432fd773'/>
<id>1facebd18fd7369e7629bce1d4fe78d5432fd773</id>
<content type='text'>
Apollo Lake (APL) only supports hardware sequencing. Add support for this
into the SPI driver, as an option.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Apollo Lake (APL) only supports hardware sequencing. Add support for this
into the SPI driver, as an option.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: ich: Add mmio_base to struct ich_spi_platdata</title>
<updated>2019-12-15T03:44:22+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-07T04:42:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=75214b051bfbbdafa5134b4320b9e4ae6ee9b22d'/>
<id>75214b051bfbbdafa5134b4320b9e4ae6ee9b22d</id>
<content type='text'>
It is useful to store the mmio base in platdata. It reduces the amount of
casting needed. Update the code and move the struct to the C file at the
same time, as we will need to use with of-platdata.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It is useful to store the mmio base in platdata. It reduces the amount of
casting needed. Update the code and move the struct to the C file at the
same time, as we will need to use with of-platdata.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: ich: Move the protection/lockdown code into a function</title>
<updated>2019-12-15T03:44:21+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-07T04:42:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=17e754492ffd3e308763f2543c9b8e4f85fac2f1'/>
<id>17e754492ffd3e308763f2543c9b8e4f85fac2f1</id>
<content type='text'>
Reduce the size of the probe function but putting this code into its own
function.

Also remove the assumption that the PCH is always a parent of the SPI
controller, as this is not the case APL platforms. Use driver model to
find the PCH instead.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reduce the size of the probe function but putting this code into its own
function.

Also remove the assumption that the PCH is always a parent of the SPI
controller, as this is not the case APL platforms. Use driver model to
find the PCH instead.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: ich-spi: Convert driver to spi-mem ops</title>
<updated>2019-08-09T14:24:02+00:00</updated>
<author>
<name>Bernhard Messerklinger</name>
<email>bernhard.messerklinger@br-automation.com</email>
</author>
<published>2019-08-02T06:38:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0709ddb68fed4dbeae09d919fc54d7235918d47b'/>
<id>0709ddb68fed4dbeae09d919fc54d7235918d47b</id>
<content type='text'>
With the introduction of the new spi-mem model operations changed
slightly. The new spi-mem operations make things a bit easier to
handle for ich-spi flash interface. This patch converts the ich-spi
driver by using spi-mem operations.

Signed-off-by: Bernhard Messerklinger &lt;bernhard.messerklinger@br-automation.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;

Tested on Intel CrownBay and MinnowMax
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;

[bmeng: fix compiler warnings when building the driver for 64-bit]
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With the introduction of the new spi-mem model operations changed
slightly. The new spi-mem operations make things a bit easier to
handle for ich-spi flash interface. This patch converts the ich-spi
driver by using spi-mem operations.

Signed-off-by: Bernhard Messerklinger &lt;bernhard.messerklinger@br-automation.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;

Tested on Intel CrownBay and MinnowMax
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;

[bmeng: fix compiler warnings when building the driver for 64-bit]
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=83d290c56fab2d38cd1ab4c4cc7099559c1d5046'/>
<id>83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: ich: Lock down controller settings if required</title>
<updated>2017-10-27T07:13:47+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-10-19T01:20:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ab20107468de5bf6b9affa93b17f2284cc838b5b'/>
<id>ab20107468de5bf6b9affa93b17f2284cc838b5b</id>
<content type='text'>
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.

Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.

Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: ich-spi: Don't read cached lock status</title>
<updated>2017-08-24T03:00:47+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-08-16T05:38:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3e7914168413f7aa05a68a53ca16e84b14d6851b'/>
<id>3e7914168413f7aa05a68a53ca16e84b14d6851b</id>
<content type='text'>
At present the ICH SPI controller driver reads the controller lock
status from its register in the probe routine and saves the lock
status to a member of priv. Later the driver uses the cached status
from priv to judge whether the controller setting is locked and do
different setup.

But such logic is only valid when there is only the SPI controller
driver that touches the SPI hardware. In fact the lock status change
can be trigged outside the driver, eg: during the fsp_notify() call
when Intel FSP is used.

This changes the driver to read the lock status every time when an
SPI transfer is initiated instead of reading the cached one.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
At present the ICH SPI controller driver reads the controller lock
status from its register in the probe routine and saves the lock
status to a member of priv. Later the driver uses the cached status
from priv to judge whether the controller setting is locked and do
different setup.

But such logic is only valid when there is only the SPI controller
driver that touches the SPI hardware. In fact the lock status change
can be trigged outside the driver, eg: during the fsp_notify() call
when Intel FSP is used.

This changes the driver to read the lock status every time when an
SPI transfer is initiated instead of reading the cached one.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
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