<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/spi/rockchip_sfc.c, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/spi/rockchip_sfc.c?h=main</id>
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<updated>2025-11-02T18:14:09Z</updated>
<entry>
<title>spi: rockchip_sfc: Support sclk_x2 version</title>
<updated>2025-11-02T18:14:09Z</updated>
<author>
<name>Jon Lin</name>
<email>jon.lin@rock-chips.com</email>
</author>
<published>2025-10-19T15:47:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c769855be2579ceba6c83e03aeccb27fa618655d'/>
<id>urn:sha1:c769855be2579ceba6c83e03aeccb27fa618655d</id>
<content type='text'>
SFC after version 8 supports dtr mode, so the IO is the binary output of
the controller clock.

Signed-off-by: Jon Lin &lt;jon.lin@rock-chips.com&gt;
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"</title>
<updated>2024-10-11T18:23:25Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-11T18:23:25Z</published>
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<id>urn:sha1:47e544f576699ca4630e20448db6a05178960697</id>
<content type='text'>
Simon Glass &lt;sjg@chromium.org&gt; says:

When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL

Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.

For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:

   #if defined(CONFIG_SPL_BUILD) &amp;&amp; !defined(CONFIG_TPL_BUILD)

In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.

This series starts a change in terminology and usage to resolve the
above issues:

- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
  'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
  defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_

It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.

This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.

The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
</content>
</entry>
<entry>
<title>drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD</title>
<updated>2024-10-11T17:44:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=371dc068bbf50c6ed6146c04ec83b644bcc79249'/>
<id>urn:sha1:371dc068bbf50c6ed6146c04ec83b644bcc79249</id>
<content type='text'>
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>spi: spi-uclass: Read chipselect and restrict capabilities</title>
<updated>2024-10-09T15:01:54Z</updated>
<author>
<name>Venkatesh Yadav Abbarapu</name>
<email>venkatesh.abbarapu@amd.com</email>
</author>
<published>2024-09-26T04:55:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=34da258bb0465de4bf44dc8949a9536cc06bf725'/>
<id>urn:sha1:34da258bb0465de4bf44dc8949a9536cc06bf725</id>
<content type='text'>
Read chipselect properties from DT which are populated using 'reg'
property and save it in plat-&gt;cs[] array for later use.

Also read multi chipselect capability which is used for
parallel-memories and return errors if they are passed on using DT but
driver is not capable of handling it.

Signed-off-by: Ashok Reddy Soma &lt;ashok.reddy.soma@amd.com&gt;
Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@amd.com&gt;
</content>
</entry>
<entry>
<title>spi: rockchip_sfc: Use linux rockchip,sfc-no-dma prop</title>
<updated>2023-05-18T00:44:04Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2023-05-17T18:26:28Z</published>
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<id>urn:sha1:f02cbff67d12b95ffaa405c9b1eb57fd16aefb8e</id>
<content type='text'>
Use the same prop as linux to control the use of fifo or dma mode. Also
add a u-boot,spl-sfc-no-dma prop to control the same in SPL.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>spi: rockchip_sfc: Add missing include for dm/device_compat.h</title>
<updated>2022-04-18T03:25:12Z</updated>
<author>
<name>Chris Morgan</name>
<email>macromorgan@hotmail.com</email>
</author>
<published>2022-03-25T15:40:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f0d49d4f0dba4bd3dc4810dbfc48e315afe023fc'/>
<id>urn:sha1:f0d49d4f0dba4bd3dc4810dbfc48e315afe023fc</id>
<content type='text'>
Add missing include for dm/device_compat.h. Without this include the
SFC driver fails to compile because dev_err and dev_dbg are not
defined.

Signed-off-by: Chris Morgan &lt;macromorgan@hotmail.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>spi: rockchip_sfc: Using read_poll</title>
<updated>2021-10-15T12:57:11Z</updated>
<author>
<name>Jon Lin</name>
<email>jon.lin@rock-chips.com</email>
</author>
<published>2021-09-17T13:14:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=24c627b57a090b141a3088208e3f70b6f28dc3d8'/>
<id>urn:sha1:24c627b57a090b141a3088208e3f70b6f28dc3d8</id>
<content type='text'>
Using read_poll logic.

Tested-by: Chris Morgan &lt;macromorgan@hotmail.com&gt;
Signed-off-by: Jon Lin &lt;jon.lin@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>spi: rockchip_sfc: Implement set_speed logic</title>
<updated>2021-10-15T12:57:11Z</updated>
<author>
<name>Jon Lin</name>
<email>jon.lin@rock-chips.com</email>
</author>
<published>2021-09-17T13:14:58Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=51f29239b75208200db2cb2a5ef9924725423374'/>
<id>urn:sha1:51f29239b75208200db2cb2a5ef9924725423374</id>
<content type='text'>
Set clock related processing into set_speed logic. And Optimize
printing format.

Tested-by: Chris Morgan &lt;macromorgan@hotmail.com&gt;
Signed-off-by: Jon Lin &lt;jon.lin@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>spi: rockchip_sfc: add support for Rockchip SFC</title>
<updated>2021-08-12T01:34:11Z</updated>
<author>
<name>Chris Morgan</name>
<email>macromorgan@hotmail.com</email>
</author>
<published>2021-08-05T08:26:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3fb08a21387b9f4f24cfd5b45f9d7f344d40fba4'/>
<id>urn:sha1:3fb08a21387b9f4f24cfd5b45f9d7f344d40fba4</id>
<content type='text'>
This patch adds support for the Rockchip serial flash controller
found on the PX30 SoC. It should work for versions 3-5 of the SFC
IP, however I am only able to test it on v3.

This is adapted from the WIP SPI-MEM driver for the SFC on mainline
Linux. Note that the main difference between this and earlier versions
of the driver is that this one does not support DMA. In testing
the performance difference (performing a dual mode read on a 128Mb
chip) is negligible. DMA, if used, must also be disabled in SPL
mode when using A-TF anyway.

Signed-off-by: Chris Morgan &lt;macromorgan@hotmail.com&gt;
Signed-off-by: Jon Lin &lt;jon.lin@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
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