u-boot.git/drivers/spi, branch v2013.07-rc2

cros: exynos: add SPI support for cros_ec

2013-06-26T14:13:24Z

This patch adds SPI support for carrying out the cros_ec protocol. Signed-off-by: Hung-ying Tyan Signed-off-by: Randall Spangler Signed-off-by: Simon Glass Acked-by: Simon Glass

spi: mxc_spi: Use DIV_ROUND_UP at appropriate places

2013-06-22T17:38:01Z

This change slightly improves readability. Signed-off-by: Axel Lin Reviewed-by: Jagannadha Sutradharudu Teki

spi: cf_qspi: Use DIV_ROUND_UP at appropriate place

2013-06-22T17:38:01Z

This change slightly improves readability. Signed-off-by: Axel Lin Signed-off-by: Richard Retanubun Reviewed-by: Jagannadha Sutradharudu Teki

Merge branch 'master' of git://git.denx.de/u-boot-spi

2013-06-13T19:18:35Z

spi: tegra20_sflash: Remove redundant code to set bus and cs of struct spi_slave

2013-06-13T17:25:30Z

It's done in spi_alloc_slave(), thus remove the redundant code. Signed-off-by: Axel Lin Acked-by: Marek Vasut Reviewed-by: Jagannadha Sutradharudu Teki

spi: tegra114_spi: Convert to use spi_alloc_slave()

2013-06-13T17:25:24Z

Signed-off-by: Axel Lin Acked-by: Marek Vasut Reviewed-by: Jagannadha Sutradharudu Teki

spi: armada100_spi: Remove unnecessary NULL test for dout and din

2013-06-13T17:25:18Z

Signed-off-by: Axel Lin Reviewed-by: Marek Vasut Acked-by: Ajay Bhargav Reviewed-by: Jagannadha Sutradharudu Teki

spi: exynos: Support SPI_PREAMBLE mode

2013-06-02T18:34:40Z

Support interfaces with a preamble before each received message. We handle this when the client has requested a SPI_XFER_END, meaning that we must close of the transaction. In this case we read until we see the preamble (or a timeout occurs), skipping all data before and including the preamble. The client will receive only data bytes after the preamble. Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde Reviewed-by: Jagannadha Sutradharudu Teki

Merge branch 'u-boot/master' into 'u-boot-arm/master'

2013-05-30T12:45:06Z

Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c

bfin: discard invalid data and clear RXS in bf5xx spi driver

2013-05-13T08:26:27Z

There may be dirty data in RDBR, so we should discard invalid data. This operation also clears RXS bit in STAT register. Signed-off-by: Scott Jiang Signed-off-by: Sonic Zhang