u-boot.git/drivers/spi, branch v2014.04 Unnamed repository; edit this file 'description' to name the repository. Merge branch 'u-boot/master' into 'u-boot-arm/master' 2014-03-25T09:53:15+00:00 Albert ARIBAUD albert.u.boot@aribaud.net 2014-03-25T09:25:14+00:00 ab6423cae0323e8db2c8fdd0a99138d93fde2137 Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c 
Trivial merge conflict, needed to manually remove
local_info as per commit 41364f0f.

Conflicts:
	board/samsung/common/board.c
sandbox: Add implementation of spi_setup_slave_fdt() 2014-03-18T02:05:50+00:00 Simon Glass sjg@chromium.org 2014-02-27T20:26:24+00:00 6e16d90aca35b8f95dd6ee9aef953d702b99eecc This function is needed when CONFIG_OF_SPI is defined. Signed-off-by: Simon Glass <sjg@chromium.org> 
This function is needed when CONFIG_OF_SPI is defined.

Signed-off-by: Simon Glass <sjg@chromium.org>
spi: atmel_dataflash: Simplify AT91F_SpiEnable implementation 2014-03-17T16:24:57+00:00 Axel Lin axel.lin@ingics.com 2014-02-21T00:55:47+00:00 7dfc4dbd2d1592ee420945afe6a82003c374b0de Refactor the code a bit to make it better in readability. Remove the comments because now the intention of the code is pretty clear. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> 
Refactor the code a bit to make it better in readability.
Remove the comments because now the intention of the code is pretty clear.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
drivers/spi/omap3: Bug fix of premature write transfer completion 2014-03-12T20:22:12+00:00 Vasili Galka vvv444@gmail.com 2014-03-09T13:56:52+00:00 ce6889a9978822172c50c92744f0ff11138e3e37 The logic determining SPI "write" transfer completion was faulty. At certain conditions (e.g. slow SPI clock freq) the transfers were interrupted before completion. Both EOT and TXS flags of channel status registeer shall be checked to ensure that all data was transferred. Tested on AM3359 chip. Signed-off-by: Vasili Galka <vasili@visionmap.com> 
The logic determining SPI "write" transfer completion was faulty. At
certain conditions (e.g. slow SPI clock freq) the transfers were
interrupted before completion. Both EOT and TXS flags of channel
status registeer shall be checked to ensure that all data was
transferred. Tested on AM3359 chip.

Signed-off-by: Vasili Galka <vasili@visionmap.com>
Merge branch 'master' of git://git.denx.de/u-boot-spi 2014-02-21T13:00:22+00:00 Tom Rini trini@ti.com 2014-02-21T13:00:22+00:00 4c89a369c7cd6e7ad3adec4601cfa69fec476164 






blackfin: add spi and i2c specific get clock functions
2014-02-20T05:46:56+00:00

Sonic Zhang
sonic.zhang@analog.com

2014-01-28T05:53:34+00:00

d6a320d5bb3050eeb9a586481145d3a75ef24db8

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>





Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>







spi: ti_qspi: Add delay before xfer for am43xx
2014-02-18T17:11:09+00:00

Sourav Poddar
sourav.poddar@ti.com

2013-12-21T07:20:10+00:00

bb7cd0ddf978b96c40a4889608c9b9ea16127afa

Without this delay, write/read is failing.
Looks like, the WIP always remain set and hence a timeout
occurs leading to the error.

Without this patch, device does not get probed also.
Here is the log.

U-Boot#
U-Boot#
U-Boot#
U-Boot# sf probe 0
SF: Unsupported flash IDs: manuf ff, jedec ffff, ext_jedec ffff
Failed to initialize SPI flash at 0:0
U-Boot# sf probe 0

While with this patch, log is
U-Boot# sf probe 0
SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000
U-Boot# sf erase 0 0x80000
SF: 524288 bytes @ 0x0 Erased: OK
U-Boot# mw 81000000 0xdededede 0x40000
U-Boot# sf write 81000000 0 0x40000
SF: 262144 bytes @ 0x0 Written: OK
U-Boot# sf read 82000000 0 0x40000
SF: 262144 bytes @ 0x0 Read: OK
U-Boot# md 0x82000000

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>





Without this delay, write/read is failing.
Looks like, the WIP always remain set and hence a timeout
occurs leading to the error.

Without this patch, device does not get probed also.
Here is the log.

U-Boot#
U-Boot#
U-Boot#
U-Boot# sf probe 0
SF: Unsupported flash IDs: manuf ff, jedec ffff, ext_jedec ffff
Failed to initialize SPI flash at 0:0
U-Boot# sf probe 0

While with this patch, log is
U-Boot# sf probe 0
SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000
U-Boot# sf erase 0 0x80000
SF: 524288 bytes @ 0x0 Erased: OK
U-Boot# mw 81000000 0xdededede 0x40000
U-Boot# sf write 81000000 0 0x40000
SF: 262144 bytes @ 0x0 Written: OK
U-Boot# sf read 82000000 0 0x40000
SF: 262144 bytes @ 0x0 Read: OK
U-Boot# md 0x82000000

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>







spi: ti_qspi: Add AM43xx specifics changes
2014-02-18T17:11:09+00:00

Sourav Poddar
sourav.poddar@ti.com

2013-12-21T07:20:09+00:00

570533b820fb4cc2bbe34c44001cc4c371617e37

Add AM43xx specific changes.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>





Add AM43xx specific changes.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>







spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3
2014-02-18T16:59:26+00:00

Markus Niebel
Markus.Niebel@tqs.de

2014-02-17T16:33:17+00:00

5d584ccec106f8919ce39562e062d822770513b7

SPI_MODE_3 requires clk high when inactive. The SCLK_CTL
field of the config reg was not configured in case of CPOL.
Fix configuration so that SPI_MODE_3 which uses CPOL configures
the clk line to be high in inactive state.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>





SPI_MODE_3 requires clk high when inactive. The SCLK_CTL
field of the config reg was not configured in case of CPOL.
Fix configuration so that SPI_MODE_3 which uses CPOL configures
the clk line to be high in inactive state.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>







spi: xilinx: Move timeout calculation out of the loop
2014-02-18T16:54:28+00:00

Michal Simek
michal.simek@xilinx.com

2014-01-22T08:48:55+00:00

999c39a45f115a17f6b894e3a9cd894c598fb2e0

Timeout calculation should be out of the data loop.
This patch increase spi bandwidth for 30%.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>





Timeout calculation should be out of the data loop.
This patch increase spi bandwidth for 30%.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>