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<title>u-boot.git/drivers/spi, branch v2014.07-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/spi?h=v2014.07-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/spi?h=v2014.07-rc2'/>
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<updated>2014-04-21T19:01:35Z</updated>
<entry>
<title>Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'</title>
<updated>2014-04-21T19:01:35Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2014-04-21T19:01:35Z</published>
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<id>urn:sha1:c9aab0f9dd23fddcebf5984dc19e62b514e759a7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>spi: davinci: add support for multiple bus and chip select</title>
<updated>2014-04-17T21:24:39Z</updated>
<author>
<name>Karicheri, Muralidharan</name>
<email>m-karicheri2@ti.com</email>
</author>
<published>2014-04-04T17:16:54Z</published>
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<id>urn:sha1:2bcdf84d5820320724932199fddeed32d2d49e4a</id>
<content type='text'>
Currently davinci spi driver supports only bus 0 cs 0.
This patch allows driver to support bus 1 and bus 2 with
configurable number of chip selects. Also defaults are
selected in a way to avoid regression on other platforms
that uses davinci spi driver and has only one spi bus.

Signed-off-by: Rex Chang &lt;rchang@ti.com&gt;
Signed-off-by: Murali Karicheri &lt;m-karicheri2@ti.com&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</content>
</entry>
<entry>
<title>spi: ti_qspi: Add delay for successful bulk erase.</title>
<updated>2014-04-17T21:20:18Z</updated>
<author>
<name>Poddar, Sourav</name>
<email>sourav.poddar@ti.com</email>
</author>
<published>2014-04-03T11:52:54Z</published>
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<id>urn:sha1:b545a98f5dc5635d55b5b3878cbb44142e863017</id>
<content type='text'>
Bulk erase is not happening properly on dra7 due to erase timing constraints,
add a delay so that erase timing constraints are properly met.

Signed-off-by: Sourav Poddar &lt;sourav.poddar@ti.com&gt;
Tested-by: Yebio Mesfin &lt;ymesfin@ti.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Tegra20 pinmux cleanup</title>
<updated>2014-04-17T15:41:05Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2014-03-21T18:28:58Z</published>
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<id>urn:sha1:70ad375ee444645001d3ca78bb17790b50232999</id>
<content type='text'>
This renames all the Tegra20 pinmux pins and functions so they have a
prefix which matches the type name.

The entries in tegra20_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'u-boot/master' into 'u-boot-arm/master'</title>
<updated>2014-03-25T09:53:15Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2014-03-25T09:25:14Z</published>
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<id>urn:sha1:ab6423cae0323e8db2c8fdd0a99138d93fde2137</id>
<content type='text'>
Trivial merge conflict, needed to manually remove
local_info as per commit 41364f0f.

Conflicts:
	board/samsung/common/board.c
</content>
</entry>
<entry>
<title>sandbox: Add implementation of spi_setup_slave_fdt()</title>
<updated>2014-03-18T02:05:50Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-02-27T20:26:24Z</published>
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<id>urn:sha1:6e16d90aca35b8f95dd6ee9aef953d702b99eecc</id>
<content type='text'>
This function is needed when CONFIG_OF_SPI is defined.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>spi: atmel_dataflash: Simplify AT91F_SpiEnable implementation</title>
<updated>2014-03-17T16:24:57Z</updated>
<author>
<name>Axel Lin</name>
<email>axel.lin@ingics.com</email>
</author>
<published>2014-02-21T00:55:47Z</published>
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<id>urn:sha1:7dfc4dbd2d1592ee420945afe6a82003c374b0de</id>
<content type='text'>
Refactor the code a bit to make it better in readability.
Remove the comments because now the intention of the code is pretty clear.

Signed-off-by: Axel Lin &lt;axel.lin@ingics.com&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</content>
</entry>
<entry>
<title>drivers/spi/omap3: Bug fix of premature write transfer completion</title>
<updated>2014-03-12T20:22:12Z</updated>
<author>
<name>Vasili Galka</name>
<email>vvv444@gmail.com</email>
</author>
<published>2014-03-09T13:56:52Z</published>
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<id>urn:sha1:ce6889a9978822172c50c92744f0ff11138e3e37</id>
<content type='text'>
The logic determining SPI "write" transfer completion was faulty. At
certain conditions (e.g. slow SPI clock freq) the transfers were
interrupted before completion. Both EOT and TXS flags of channel
status registeer shall be checked to ensure that all data was
transferred. Tested on AM3359 chip.

Signed-off-by: Vasili Galka &lt;vasili@visionmap.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-spi</title>
<updated>2014-02-21T13:00:22Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-02-21T13:00:22Z</published>
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<id>urn:sha1:4c89a369c7cd6e7ad3adec4601cfa69fec476164</id>
<content type='text'>
</content>
</entry>
<entry>
<title>blackfin: add spi and i2c specific get clock functions</title>
<updated>2014-02-20T05:46:56Z</updated>
<author>
<name>Sonic Zhang</name>
<email>sonic.zhang@analog.com</email>
</author>
<published>2014-01-28T05:53:34Z</published>
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<id>urn:sha1:d6a320d5bb3050eeb9a586481145d3a75ef24db8</id>
<content type='text'>
Signed-off-by: Sonic Zhang &lt;sonic.zhang@analog.com&gt;
</content>
</entry>
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