u-boot.git/drivers/spi, branch v2016.05

mtd: cqspi: Simplify indirect read code

2016-05-06T16:41:49+00:00

The indirect read code is a pile of nastiness. This patch replaces
the whole unmaintainable indirect read implementation with the one
from upcoming Linux CQSPI driver, which went through multiple rounds
of thorough review and testing. All the patch does is it plucks out
duplicate ad-hoc code distributed across the driver and replaces it
with more compact code doing exactly the same thing. There is no
speed change of the read operation.

Signed-off-by: Marek Vasut 
Cc: Anatolij Gustschin 
Cc: Chin Liang See 
Cc: Dinh Nguyen 
Cc: Jagan Teki 
Cc: Pavel Machek 
Cc: Stefan Roese 
Cc: Vignesh R

mtd: cqspi: Simplify indirect write code

2016-05-06T16:41:49+00:00

The indirect write code is buggy pile of nastiness which fails horribly
when the system runs fast enough to saturate the controller. The failure
results in some pages (256B) not being written to the flash. This can be
observed on systems which run with Dcache enabled and L2 cache enabled,
like the Altera SoCFPGA.

This patch replaces the whole unmaintainable indirect write implementation
with the one from upcoming Linux CQSPI driver, which went through multiple
rounds of thorough review and testing. While this makes the patch look
terrifying and violates all best-practices of software development, all
the patch does is it plucks out duplicate ad-hoc code distributed across
the driver and replaces it with more compact code doing exactly the same
thing.

Signed-off-by: Marek Vasut 
Cc: Anatolij Gustschin 
Cc: Chin Liang See 
Cc: Dinh Nguyen 
Cc: Jagan Teki 
Cc: Pavel Machek 
Cc: Stefan Roese 
Cc: Vignesh R

spi: kirkwood_spi: Add support for multiple chip-selects on MVEBU

2016-04-06T13:38:56+00:00

Currently only chip-select 0 is supported by the kirkwood SPI driver.
The Armada XP / 38x SoCs also use this driver and support multiple chip
selects. This patch adds support for multiple CS on MVEBU.

The register definitions are restructured a bit with this patch. Grouping
them to the corresponding registers.

Signed-off-by: Stefan Roese 
Cc: Luka Perkov 
Reviewed-by: Jagan Teki

spi: kirkwood_spi.c: Add compatible match ID for Armada 375

2016-04-04T09:21:27+00:00

This enables this driver for the Marvell Armada 375 SoC.

Signed-off-by: Stefan Roese 
Cc: Luka Perkov 
Reviwer-by: Jagan Teki

spi: omap3: Fix multiple definition of 'priv'

2016-03-15T18:50:09+00:00

Global definition of priv seems no-sense to use it
for non-dm case and pass the pointer to functions
which are common to both dm and non-dm.

So, fix this by removing omap3_spi_slave from non-dm
and make visible to omap3_spi_priv for both dm and non-dm.

Cc: Christophe Ricard 
Reported-by: Tom Rini 
Signed-off-by: Jagan Teki

spi: omap3: Convert to driver model

2016-03-14T17:16:28+00:00

After this conversion the driver will able to support both dm and non-dm
and code is more extensible like we can remove the non-dm part simply
without touching anycode if all the boards which are using this driver
become dm driven.

Cc: Tom Rini 
Reviewed-by: Simon Glass 
Acked-by: Christophe Ricard 
Tested-by: Christophe Ricard 
Signed-off-by: Jagan Teki 
[Set priv->wordlen, Add Kconfig entry and file credit for dm conversion]
Signed-off-by: Christophe Ricard

spi: omap3: Make local functions as static

2016-03-14T17:16:28+00:00

Attach static on local defined functions.

Cc: Tom Rini 
Cc: Simon Glass 
Signed-off-by: Jagan Teki 
Signed-off-by: Christophe Ricard

spi: omap3: Move headers code inside the driver

2016-03-14T17:16:16+00:00

Header file have macro's and register definition and some unneeded
function proto types which becomes tunned further in future patches
and entire driver code resides in one file for more readability.

Cc: Tom Rini 
Cc: Simon Glass 
Signed-off-by: Jagan Teki 
[Fixes on code styles, Remove omap3_spi_txrx|write|read in header]
Signed-off-by: Christophe Ricard

dm: ti_qspi: Fix conversion of address to a pointer

2016-03-12T14:25:42+00:00

TI QSPI driver directly typecasts fdt_addr_t to a pointer. This is
not strictly correct, as it gives a build warning when fdt_addr_t is u64.
So, use map_physmem for a proper typecasts.

This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address
instead of a pointer for the uart base")

Signed-off-by: Lokesh Vutla 
Reviewed-by: Jagan Teki 
Reviewed-by: Tom Rini 
Reviewed-by: Mugunthan V N

spi: spi-uclass: Set slave wordlen with SPI_DEFAULT_WORDLEN

2016-02-23T10:44:46+00:00

In some case wordlen may not be set. Use SPI_DEFAULT_WORDLEN as default.

Signed-off-by: Christophe Ricard 
Reviewed-by: Simon Glass 
Reviewed-by: Jagan Teki