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<title>u-boot.git/drivers/spi, branch v2016.07-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/spi?h=v2016.07-rc1</id>
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<updated>2016-05-24T17:42:03Z</updated>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2016-05-24T17:42:03Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-05-24T17:42:03Z</published>
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<id>urn:sha1:fc15b9beed05dec6cc092c265042381a0eadb0e9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-mips</title>
<updated>2016-05-23T15:51:37Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-05-21T00:43:27Z</published>
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<id>urn:sha1:d7d000311285e4b8d11e089ca13ea456a01be3b8</id>
<content type='text'>
</content>
</entry>
<entry>
<title>omap3: Fix SPI registers on am33xx and am43xx</title>
<updated>2016-05-23T15:50:22Z</updated>
<author>
<name>Martin Hejnfelt</name>
<email>mh@newtec.dk</email>
</author>
<published>2016-05-19T07:11:58Z</published>
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<id>urn:sha1:5f89a15e1630e9050c8b1b5307ccd800e4596ce5</id>
<content type='text'>
When the base registers are read from device tree the base is not
0x48030100 as the driver expects, but 0x48030000, resulting in
non functioning SPI. To deal with this, use same idea as how this
is done in the linux kernel (drivers/spi/spi-omap2-mcspi.c) and
add a structure with a field that is used to shift the registers
on these systems.

v2: Fixed commit subject line to correct cpu

Signed-off-by: Martin Hejnfelt &lt;mh@newtec.dk&gt;
</content>
</entry>
<entry>
<title>ath79: spi: Remove the explicit pinctrl setting</title>
<updated>2016-05-20T23:36:37Z</updated>
<author>
<name>Wills Wang</name>
<email>wills.wang@live.com</email>
</author>
<published>2016-04-12T03:09:18Z</published>
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<id>urn:sha1:5fabf2e7da1b738c6e0353b6a5a17b1a77ecc2e9</id>
<content type='text'>
The correct pinctrl is handled automatically so we don't need to do it in
the driver.

Signed-off-by: Wills Wang &lt;wills.wang@live.com&gt;
</content>
</entry>
<entry>
<title>drivers: spi: add spi support for QCA/Atheros ath79 SOCs</title>
<updated>2016-05-20T23:25:50Z</updated>
<author>
<name>Wills Wang</name>
<email>wills.wang@live.com</email>
</author>
<published>2016-03-16T08:59:58Z</published>
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<id>urn:sha1:b85dc4607268ffc49af642ab702d44c8b5ef3719</id>
<content type='text'>
This patch add a compatible spi driver for ath79 series SOC.

Signed-off-by: Wills Wang &lt;wills.wang@live.com&gt;
Reviewed-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>spi: fsl_qspi: Enable Spansion S25FS-S family flashes</title>
<updated>2016-05-18T15:51:16Z</updated>
<author>
<name>Yuan Yao</name>
<email>yao.yuan@nxp.com</email>
</author>
<published>2016-03-15T06:36:42Z</published>
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<id>urn:sha1:febffe8dd1c7ba841890eec578b050bb6faa3273</id>
<content type='text'>
The flash type of LS2085AQDS QSPI is S25FS256S. It has special write
any device register command and read any device register command.
This patch enable support for those commands.

Signed-off-by: Yuan Yao &lt;yao.yuan@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>spi: fsl_qspi: Assign AMBA mem according CS num in dts</title>
<updated>2016-05-18T15:51:06Z</updated>
<author>
<name>Yuan Yao</name>
<email>yao.yuan@nxp.com</email>
</author>
<published>2016-03-15T06:36:41Z</published>
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<id>urn:sha1:4e14741833607f49eaccdfd4add9cb39e103c2db</id>
<content type='text'>
QSPI controller automatic enable the chipselect signal according the
dest AMBA memory address. Now we distribute the AMBA memory zone
averagely to every chipselect slave device according chipselect
numbers got from dts node.

Signed-off-by: Yuan Yao &lt;yao.yuan@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>spi: fsl_qspi: Fix issues on arm64</title>
<updated>2016-05-18T15:50:48Z</updated>
<author>
<name>Yuan Yao</name>
<email>yao.yuan@nxp.com</email>
</author>
<published>2016-03-15T06:36:40Z</published>
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<id>urn:sha1:bf9bffa9784411ba743b127adc031bcb6e27735d</id>
<content type='text'>
The address value and size value get from dts "reg" property have
type of u64 on arm64. If we assign those values to "u32" variables,
driver can't work correctly. Converting the type of those variables
to fdt_xxx_t.

Signed-off-by: Yuan Yao &lt;yao.yuan@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>dm: spi: introduce dm api</title>
<updated>2016-05-17T15:54:43Z</updated>
<author>
<name>Peng Fan</name>
<email>van.freenix@gmail.com</email>
</author>
<published>2016-05-03T02:02:22Z</published>
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<id>urn:sha1:7a3eff4ce962de50bd9a1d83a9fce178c04999d3</id>
<content type='text'>
Introduce dm_spi_claim_bus, dm_spi_release_bus and dm_spi_xfer
Convert spi_claim_bus, spi_release_bus and spi_xfer to use
the new API.

Signed-off-by: Peng Fan &lt;van.freenix@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Jagan Teki &lt;jteki@openedev.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: spi: soft_spi: switch to use linux compatible string</title>
<updated>2016-05-17T15:54:43Z</updated>
<author>
<name>Peng Fan</name>
<email>van.freenix@gmail.com</email>
</author>
<published>2016-05-03T02:02:21Z</published>
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<id>urn:sha1:102412c415b5e51b01ed5797c965d0feaa065439</id>
<content type='text'>
1. Support compatible string "spi-gpio" which is used by Linux
   Linux use different bindings, so use UBOOT_COMPAT and
   LINUX_COMPAT to differentiate them.
2. Introduce SPI_MASTER_NO_RX and SPI_MASTER_NO_TX to handle
   no rx or no tx case.
3. Tested on i.MX6 UltraLite board with 74LV595 spi-gpio chip.

Signed-off-by: Peng Fan &lt;van.freenix@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Przemyslaw Marczak &lt;p.marczak@samsung.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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