u-boot.git/drivers/spi, branch v2016.11-rc1

spi: Add driver for Marvell Armada 3700 SoC

2016-09-27T15:29:52Z

The SPI IP core in the Marvell Armada 3700 is similar to the one in the other Armada SoCs. But the differences are big enough that it makes sense to introduce a new driver instead of cluttering the old kirkwood driver with #ifdef's. Signed-off-by: Stefan Roese Cc: Nadav Haklai Cc: Kostya Porotchkin Cc: Wilson Ding Cc: Victor Gu Cc: Hua Jing Cc: Terry Zhou Cc: Hanna Hawa Cc: Haim Boot Reviewed-by: Jagan Teki

treewide: replace #include with

2016-09-23T21:55:42Z

Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap ) Replace all include directives for with . Signed-off-by: Masahiro Yamada [trini: Fixup include/clk.] Signed-off-by: Tom Rini

Merge branch 'master' of git://git.denx.de/u-boot-spi

2016-09-22T15:36:45Z

spi: Kconfig: Move FSL_QSPI entry to non-dm place

2016-09-22T08:46:28Z

Since FSL_QSPI driver still supporting non-dm code better to move the Kconfig from DM undefined place. Cc: Stefano Babic Reviewed-by: Peng Fan Signed-off-by: Jagan Teki

spi: zynq: Use variable to remove u32 to u64 conversions

2016-09-22T05:33:20Z

Current code generates warning when it is compiled for arm64: Warnings: In file included from drivers/spi/zynq_spi.c:14:0: drivers/spi/zynq_spi.c: In function ‘zynq_spi_init_hw’: drivers/spi/zynq_spi.c:95:9: warning: large integer implicitly truncated to unsigned type [-Woverflow] writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ drivers/spi/zynq_spi.c: In function ‘zynq_spi_release_bus’: drivers/spi/zynq_spi.c:177:9: warning: large integer implicitly truncated to unsigned type [-Woverflow] writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ This patch is using one variable to do conversion via u32 variable. Signed-off-by: Michal Simek Reviewed-by: Jagan Teki

spi: Use mode for rx mode flags

2016-09-21T19:32:28Z

Make rx mode flags as generic to spi, earlier mode_rx is maintained separately because of some flash specific code. Cc: Simon Glass Cc: Bin Meng Cc: Michal Simek Cc: Siva Durga Prasad Paladugu Cc: Vignesh R Cc: Mugunthan V N Signed-off-by: Jagan Teki

spi: ti_qspi: Remove unnecessary udelay for AM437x

2016-09-21T19:28:26Z

This udelay() was added as an HACK and is no longer required. All read/write/erase operations work fine even without this delay. Hence, remove the udelay() call. Tested read/write/erase operation on AM437x SK. Also tested QSPI Boot. Signed-off-by: Vignesh R Reviewed-by: Tom Rini Reviewed-by: Jagan Teki

spi: ti_qspi: use 128 bit transfer mode when writing to flash

2016-09-21T19:28:26Z

TI QSPI has four 32 bit data registers which can be used to transfer 16 bytes of data at once. The register group QSPI_SPI_DATA_REG_3, QSPI_SPI_DATA_REG_2, QSPI_SPI_DATA_REG_1 and QSPI_SPI_DATA_REG is treated as a single 128-bit word for shifting data in and out. The bit at QSPI_SPI_DATA_REG_3[31] position is the first bit to be shifted out in case of 128 bit transfer mode. Therefore the first byte to be written to flash should be at QSPI_SPI_DATA_REG_3[31-25] position. Instead of writing 1 byte at a time when interacting with SPI NOR flash, make use of all the four registers so that 16 bytes can be transferred in one go. With this patch, the flash write speed increases from ~250KBs/ to ~650KB/s on DRA74 EVM. Signed-off-by: Vignesh R Reviewed-by: Tom Rini Reviewed-by: Jagan Teki

spi: zynq_spi: Fix infinite looping while xfer

2016-09-21T19:28:26Z

During spi transfer, for example: sspi 1:1.0 8 ff the rx_len values will be: rx_len = 0 rx_len = 4294967295 This caused a busy looping during xfer, this patch fixes it by adding a check while reading the rx fifo Signed-off-by: Lad, Prabhakar Cc: Michal Simek Cc: Siva Durga Prasad Paladugu Reviewed-by: Jagan Teki

spi: tegra: fix hang in set_mode()

2016-08-25T22:35:03Z

In tegra20_slink.c, the set_mode() function may be executed before the SPI bus is claimed the first time, and hence the clocks to the SPI controller may not be running. If so, any register read/write at this time will hang the CPU. Fix this by ensuring the clock is running as soon as the driver is probed. This is observed on the Tegra30 Beaver board. Apply the same clock initialization fix to all other Tegra SPI drivers so that if set_mode() is ever implemented there, the same bug will not appear. Note that tegra114_spi.c already operates in this fashion. The clock manipulation code is copied from claim_bus() to probe() rather than moved. This ensures that any calls to set_speed() take effect; the clock can't be set once during probe and left unchanged. Fixes: 5cb1b7b395c0 ("spi: tegra20: Add support for mode selection") Cc: Mirza Krak Signed-off-by: Stephen Warren Reviewed-by: Simon Glass Signed-off-by: Tom Warren