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<title>u-boot.git/drivers/spi, branch v2018.09-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/spi?h=v2018.09-rc1</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/spi?h=v2018.09-rc1'/>
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<updated>2018-07-23T18:33:21Z</updated>
<entry>
<title>spi: stm32_qspi: rework mode management</title>
<updated>2018-07-23T18:33:21Z</updated>
<author>
<name>Christophe Kerello</name>
<email>christophe.kerello@st.com</email>
</author>
<published>2018-07-09T13:32:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d68b6ad1382b5357e77ce6b4d3fd74831835d62e'/>
<id>urn:sha1:d68b6ad1382b5357e77ce6b4d3fd74831835d62e</id>
<content type='text'>
This patch solves quad read issue with Macronix/Micron spi nor.

Signed-off-by: Christophe Kerello &lt;christophe.kerello@st.com&gt;
Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr</title>
<updated>2018-07-23T18:33:21Z</updated>
<author>
<name>Christophe Kerello</name>
<email>christophe.kerello@st.com</email>
</author>
<published>2018-07-09T13:32:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ceff933e1e359e03bff17b22c0599ee29c4c5924'/>
<id>urn:sha1:ceff933e1e359e03bff17b22c0599ee29c4c5924</id>
<content type='text'>
This patch assigns the functional operation mode in _stm32_qspi_gen_ccr
function.

Signed-off-by: Christophe Kerello &lt;christophe.kerello@st.com&gt;
Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>spi: zynqmp_gqspi: Add support for ZynqMP qspi driver</title>
<updated>2018-07-16T08:31:47Z</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2018-07-04T12:01:23Z</published>
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<id>urn:sha1:22cca1730ec42b84f23173a6075ffa39a9a77bdc</id>
<content type='text'>
This patch adds qspi driver support for ZynqMP SoC. This
driver is responsible for communicating with qspi flash
devices.

Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
[jagan: removed GQSPI_MIO_NUM_ macros]
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>spi: xilinx_spi: convert to livetree</title>
<updated>2018-07-16T08:31:20Z</updated>
<author>
<name>Vipul Kumar</name>
<email>vipul.kumar@xilinx.com</email>
</author>
<published>2018-06-30T02:45:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6e9d9fcb4cfc869dfad9d9207f44595e7ce17a95'/>
<id>urn:sha1:6e9d9fcb4cfc869dfad9d9207f44595e7ce17a95</id>
<content type='text'>
Update the xilinx spi driver to support a live tree.

Signed-off-by: Vipul Kumar &lt;vipul.kumar@xilinx.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>spi: xilinx_spi: Added support to read JEDEC-id twice at the boot time</title>
<updated>2018-07-16T08:31:20Z</updated>
<author>
<name>Vipul Kumar</name>
<email>vipul.kumar@xilinx.com</email>
</author>
<published>2018-06-30T02:45:19Z</published>
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<id>urn:sha1:83ce646943f6bc8eb3a42e68eb53bbbe6c40123f</id>
<content type='text'>
This patch is for the startup block issue in the spi controller.
SPI clock is passing through STARTUP block to FLASH. STARTUP block
don't provide clock as soon as QSPI provides command. So, first
command fails.

This patch added support to read JEDEC id in xilinx_spi_xfer ().

Signed-off-by: Vipul Kumar &lt;vipul.kumar@xilinx.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>spi: xilinx_spi: Modify transfer logic xilinx_spi_xfer() function</title>
<updated>2018-07-16T08:31:20Z</updated>
<author>
<name>Vipul Kumar</name>
<email>vipul.kumar@xilinx.com</email>
</author>
<published>2018-06-30T02:45:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0c0de58f7b306e524225d03d8fd4fdd907a5ae5f'/>
<id>urn:sha1:0c0de58f7b306e524225d03d8fd4fdd907a5ae5f</id>
<content type='text'>
This patch modify xilinx_spi_xfer() function and add rxfifo() and
txfifo() functions to add the modularity so that these functions
can be used by other functions within the same file.

This patch also added support to read fifo_size from dts.

Signed-off-by: Vipul Kumar &lt;vipul.kumar@xilinx.com&gt;
Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>spi: xilinx: Read reg base address from DTS file</title>
<updated>2018-07-16T08:31:20Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-06-30T02:45:17Z</published>
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<id>urn:sha1:4e7c1a26518fc4332f23c3ee001e10a31555b2b1</id>
<content type='text'>
This patch added support to read register base address from DTS file.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Vipul Kumar &lt;vipul.kumar@xilinx.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>spi: cadence_qspi: Fix warning cast from pointer to integer of different size</title>
<updated>2018-07-12T07:22:11Z</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2018-06-01T08:52:20Z</published>
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<id>urn:sha1:8b71e46ceab8b66208107de688cbb4dd25fe38cd</id>
<content type='text'>
Use "%p" to print cmdbuf.

Compilation warning as below:

  CC      spl/drivers/spi/cadence_qspi_apb.o
  LD      spl/lib/built-in.o
drivers/spi/cadence_qspi_apb.c: In function ‘cadence_qspi_apb_indirect_write_setup’:
drivers/spi/cadence_qspi_apb.c:696:18: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
          cmdlen, (unsigned int)cmdbuf);

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>spi: cadence_qspi: Fix compilation warning</title>
<updated>2018-07-12T07:22:11Z</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2018-07-06T02:39:14Z</published>
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<id>urn:sha1:9bd39dd8e5f600560a00203ccb3e4e87780e10a2</id>
<content type='text'>
Use "%zu" for size_t data type.

Compilation warning as below:

In file included from include/linux/bug.h:7:0,
                 from include/common.h:26,
                 from drivers/spi/cadence_qspi.c:8:
drivers/spi/cadence_qspi.c: In function ‘cadence_spi_xfer’:
drivers/spi/cadence_qspi.c:211:8: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);
        ^
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
 #define pr_fmt(fmt) fmt
                     ^~~
include/log.h:142:2: note: in expansion of macro ‘debug_cond’
  debug_cond(_DEBUG, fmt, ##args)
  ^~~~~~~~~~
drivers/spi/cadence_qspi.c:211:2: note: in expansion of macro ‘debug’
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>board: arm: Add support for Broadcom BCM7445</title>
<updated>2018-07-10T20:55:57Z</updated>
<author>
<name>Thomas Fitzsimmons</name>
<email>fitzsim@fitzsim.org</email>
</author>
<published>2018-06-08T21:59:45Z</published>
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<id>urn:sha1:894c3ad27fa940beb7fdc07d01dcfe81c03d0481</id>
<content type='text'>
Add support for loading U-Boot on the Broadcom 7445 SoC.  This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.

Signed-off-by: Thomas Fitzsimmons &lt;fitzsim@fitzsim.org&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
</entry>
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