u-boot.git/drivers/spi, branch v2020.07-rc2

spi: nxp-fspi: Use new readl_poll_sleep_timeout API

2020-05-10T20:00:49Z

Board gets reset when performing burst read/write operations. On the other hand, no such behaviour is observed on small size operations. In Linux, readl_poll_timeout API already adds delay of 1us which is further skipped in U-boot. Hence, use new "readl_poll_sleep_timeout" API which adds delay alongwith timeout functionality. Signed-off-by: Kuldeep Singh

spi: Zap lpc32xx_ssp driver-related code

2020-05-10T20:00:49Z

lpc32xx_ssp driver is deprecated, no active updates and no board user, hence dropped the same. Cc: Vladimir Zapolskiy Cc: Albert ARIBAUD Cc: Tom Rini Signed-off-by: Jagan Teki

spi: sifive: Fix QPP transfer

2020-04-30T17:04:20Z

The guessed reason is that the existing logic of filling tx fifo with data, rx fifo with NULL for tx transfer and filling rx fifo with data, tx fifo with NULL for rx transfer is not clear enough to support the Quad Page Program. SiFive SPI controllers have specific sets of watermark registers and SPI I/O directions bits in order to program SPI controllers clear enough to support all sets of operating modes. Here is the exact programing sequence that would follow on this patch and tested via SPI-NOR and MMC_SPI. - set the frame format proto, endian - set the frame format dir, set it for tx and clear it for rx - TX transfer: fill tx fifo with data. wait for TX watermark bit to clear. - RX transfer: fill tx fifo with 0xff. write nbytes to rx watermark register wait for rx watermark bit to clear. read the rx fifo data. So, this patch adopts this program sequence and fixes the existing I/O direction bit. Cc: Vignesh R Signed-off-by: Jagan Teki Tested-by: Sagar Kadam

spi: sifive: Fix format register proto field

2020-04-30T17:04:20Z

SiFive SPI controller has a proto bit field in frame format register which would be used to configure the SPI I/O protocol lines used on specific transfer. Right now the driver is configuring this proto using slave->mode, for all types of transctions. This makes the driver unable to function since the proto needs to configure dynamically for each and every transaction separately at runtime. Now, the controller driver supports per transfer via spi-mem exec_opo, so add the fmt_proto flag and fill the per transfer buswidth so that the controller configures the proto bit at runtime. This patch fixes the SPI controller works with SPI NOR flash on quad read with page program. Cc: Vignesh R Signed-off-by: Jagan Teki Tested-by: Sagar Kadam

spi: sifive: Add spi-mem exec op

2020-04-30T17:04:20Z

SiFive SPI controller is responsible to handle the slave devices like mmc spi and spi nor flash. The controller is designed such a way that it would handle the slave transactions based on the I/O protocol numbers, example if spi nor slave send quad write opcode it has to send alone with I/O protocol number of 4 and if it try to send data it has to send I/O protocol number along with 4 line data. But the current spi-xfer code from spi-mem is combining the opcode and address in a single transaction, so the SPI controller will be unable to identify the I/O protocol number of opcode vs address. So, add the spi-mem exec_op with spi-xfer of opcode, address and data as a separate transaction. This doesn't remove the .xfer of dm_spi_ops since mmc spi will make use of it. Note: This code might have moved to the spi-mem core area once we have done the dedicated tests on other controllers and have real reason to move. Cc: Vignesh R Signed-off-by: Jagan Teki Tested-by: Sagar Kadam

spi: sifive: Tidy up dm_spi_slave_platdata variable

2020-04-30T17:04:20Z

Usually variable name slave is used for spi_slave structure and slave_plat for the dm_spi_slave_platdata. Let's follow this meaningful notation by replacing slave with slave_plat for dm_spi_slave_platdata structure. Signed-off-by: Jagan Teki Reviewed-by: Bin Meng

spi: spi-mem: Add SPI_MEM_NO_DATA to the spi_mem_data_dir enum

2020-04-28T20:14:35Z

Commit: 0ebb261a0b2d ("spi: spi-mem: Add SPI_MEM_NO_DATA to the spi_mem_data_dir enum") in linux. When defining spi_mem_op templates we don't necessarily know the size that will be passed when the template is actually used, and basing the supports_op() check on op->data.nbytes to know whether there will be data transferred for a specific operation is not possible. Add SPI_MEM_NO_DATA to the spi_mem_data_dir enum so that we can base our checks on op->data.dir instead of op->data.nbytes. This also fixes a bug identified with the atmel-quaspi driver. The spi-nor core, when erasing sectors, fills the spi_mem_op template using SPI_MEM_OP_NO_DATA, which initializes all the data members with value zero. This is wrong because data.dir is treated as SPI_MEM_DATA_IN, which translates in our driver to read accesses for erases (RICR), while the controller expects write accesses (WICR). Signed-off-by: Tudor Ambarus Reviewed-by: Jagan Teki

spi: cadence-qspi: Move ref clock calculation to probe

2020-04-28T20:14:35Z

"assigned-clock-parents" and "assigned-clock-rates" DT properties take effect only after ofdata_to_platdata() when clk_set_defaults() is called in device_probe(). Therefore clk get rate() would return a wrong value in ofdata_to_platdata() when compared with probe. Hence it needs to be moved to probe. Tested on u-boot-ti/next. Signed-off-by: Pratyush Yadav Acked-by: Vignesh Raghavendra Acked-by: Simon Goldschmidt Reviewed-by: Jagan Teki

spi: Transform the FSL QuadSPI driver to use the SPI MEM API

2020-04-28T20:14:35Z

To support the SPI MEM API, instead of modifying the existing U-Boot driver, this patch adds a port of the existing Linux driver. This also has the advantage that porting changes and fixes from Linux will be easier. Porting of driver left most of the functions unchanged while few of the changes are: -Remove lock(mutexes) and irq handler as u-boot is a single core execution. -Remove invalid masterid as it was required specially for multicore execution in LS2088ARDB which is not the case in u-boot. -Remove clock support as changing spi speed is not supported in uboot and nor in linux. Currently tested on LS1088ARDB, LS1012ARDB, LS1046ARDB, LS1046AFRWY, LS1043AQDS, LS1021ATWR, LS2088ARDB, I.MX6ULL EVK. Signed-off-by: Frieder Schrempf Signed-off-by: Ashish Kumar Signed-off-by: Kuldeep Singh Reviewed-by: Stefan Roese Tested-by: Stefan Roese Acked-by: Vignesh Raghavendra Acked-by: Jagan Teki

spi: mpc8xxx_spi: fix missing dev_err definition

2020-04-24T20:40:09Z

The build currently fails with drivers/spi/mpc8xxx_spi.c:64:3: warning: implicit declaration of function ‘dev_err’ [-Wimplicit-function-declaration] ... drivers/spi/built-in.o: In function `mpc8xxx_spi_set_speed': drivers/spi/mpc8xxx_spi.c:227: undefined reference to `dev_err' Fixes: 4856cc7a97 (mpc8xxx_spi: implement real ->set_speed) Fixes: 1a7b462dee (mpc8xxx_spi: put max_cs to use) Signed-off-by: Rasmus Villemoes