u-boot.git/drivers/spi, branch v2021.07

spi: Update speed/mode on change

2021-06-30T12:06:30Z

The spi_get_bus_and_cs() may be called on the same bus and chipselect with different frequency or mode. This is valid usecase, but the code fails to notify the controller of such a configuration change. Call spi_set_speed_mode() in case bus frequency or bus mode changed to let the controller update the configuration. The problem can easily be triggered using the sspi command: => sspi 0:0@1000 => sspi 0:0@2000 Without this patch, both transfers happen at 1000 Hz. With this patch, the later transfer happens correctly at 2000 Hz. Signed-off-by: Marek Vasut Cc: Jagan Teki Cc: Patrick Delaunay

spi: zynqmp_gqspi: Fix write issue

2021-06-11T07:24:58Z

Enable manual start in zynqmp_qspi_fill_gen_fifo(). Also enable GQSPI_IXR_GFNFULL_MASK and check for it instead of GQSPI_IXR_GFEMTY_MASK. Add dummy write to genfifo register in chipselect. Signed-off-by: Ashok Reddy Soma

spi: kirkwood: prevent limiting speed to 0

2021-05-16T04:48:45Z

After commit 1fe929ed497bcc8975be8d37383ebafd22b99dd2 ("spi: kirkwood: prevent configuring speed exceeding max controller freq") the spi frequency could be set to 0 on platform where spi-max-frequency is not defined (e.g. on armada-388-gp). Prevent limiting speed in mentioned cases. Signed-off-by: Grzegorz Jaszczyk Tested-by: Kostya Porotchkin Reviewed-by: Marcin Wojtas Reviewed-by: Kostya Porotchkin Signed-off-by: Stefan Roese

spi: kirkwood: prevent configuring speed exceeding max controller freq

2021-05-16T04:48:45Z

This patch adds a limitation in the kirkwood_spi driver set_speed hook, which prevents setting too high transfer speed. Signed-off-by: Marcin Wojtas Reviewed-by: Kostya Porotchkin Tested-by: Kostya Porotchkin Signed-off-by: Stefan Roese

spi: kirkwood: support extended baud rates

2021-05-16T04:48:45Z

The Armada SoC family implementation of this SPI hardware module has extended the configuration register to allow for a wider range of SPI clock rates. Specifically the Serial Baud Rate Pre-selection bits in the SPI Interface Configuration Register now also use bits 6 and 7 as well. Modify the baud rate calculation to handle these differences for the Armada case. Potentially a baud rate can be setup using a number of different pre-scalar and scalar combinations. This code tries all possible pre-scalar divisors (8 in total) to try and find the most accurate set. Signed-off-by: Ken Ma Signed-off-by: Stefan Roese

atcspi200: Add timeout mechanism in spi_xfer()

2021-05-05T08:12:14Z

Adding timeout mechanism to avoid spi driver from stucking in the while loop in __atcspi200_spi_xfer(). Signed-off-by: Dylan Jhong Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen

spi: zynqmp: Remove gd reference

2021-04-29T12:48:31Z

gd is not used in this file that's why doesn't make sense to declare it. Signed-off-by: Michal Simek

Merge tag 'xilinx-for-v2021.07' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

2021-03-31T13:47:30Z

Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)

spi: xilinx_spi: Trivial fixes in axi qspi driver

2021-03-30T10:03:24Z

Use __func__ instead for function name in debug. Use Linux style u32 instead of uint32_t. Signed-off-by: T Karthik Reddy Acked-by: Ashok Reddy Soma Signed-off-by: Michal Simek

spi: spi-uclass: Add support to manually relocate spi memory ops

2021-03-27T03:26:48Z

Add spi memory operations to relocate manually when CONFIG_NEEDS_MANUAL_RELOC is enabled. Signed-off-by: T Karthik Reddy Acked-by: Ashok Reddy Soma Signed-off-by: Michal Simek Reviewed-by: Pratyush Yadav