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<title>u-boot.git/drivers/spi, branch v2024.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/spi?h=v2024.01-rc2</id>
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<updated>2023-10-30T19:32:49Z</updated>
<entry>
<title>Kconfig: Remove all default n/no options</title>
<updated>2023-10-30T19:32:49Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2023-10-25T07:25:37Z</published>
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<id>urn:sha1:18370f14975ca4abb15cb9700f57d82587e620b4</id>
<content type='text'>
Similar change was done by commit b4c2c151b14b ("Kconfig: Remove all
default n/no options") and again sync is required.

default n/no doesn't need to be specified. It is default option anyway.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Reviewed-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt; # tegra
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Angelo Dureghello &lt;angelo@kernel-space.org&gt;
</content>
</entry>
<entry>
<title>spi: add support for Amlogic A1 SPI Flash Controller</title>
<updated>2023-10-27T16:49:52Z</updated>
<author>
<name>Igor Prusov</name>
<email>IVPrusov@sberdevices.ru</email>
</author>
<published>2023-10-24T22:51:39Z</published>
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<id>urn:sha1:b59b0ce118667b6f3c30b848edfe9d1ead89ec8e</id>
<content type='text'>
Add A1 SPIFC driver from Linux. Slightly modified to use u-boot driver
framework and accommodate to lack of ioread32_rep/iowrite32_rep.

Based on Linux version 6.6-rc4

Signed-off-by: Igor Prusov &lt;IVPrusov@sberdevices.ru&gt;
Signed-off-by: Martin Kurbanov &lt;mmkurbanov@sberdevices.ru&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Link: https://lore.kernel.org/r/20231024225140.366571-2-ivprusov@sberdevices.ru
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
[trini: Drop &lt;common.h&gt; as it's not needed]
</content>
</entry>
<entry>
<title>spi: mtk_spim: prevent global pll clock override</title>
<updated>2023-10-11T17:21:33Z</updated>
<author>
<name>Nicolò Veronese</name>
<email>nicveronese@gmail.com</email>
</author>
<published>2023-10-03T22:14:26Z</published>
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<id>urn:sha1:538b97dd5d6be8206b532664cf616c567434368d</id>
<content type='text'>
With commit 793e62301180 ("spi: mtk_spim: get spi clk rate only once") a
new system to calculate the SPI clocks has been added.

Unfortunately, the do_div macro overrides the global priv-&gt;pll_clk_rate
field. This will cause to have a reduced clock rate on each subsequent
SPI call.

Signed-off-by: Valerio 'ftp21' Mancini &lt;ftp21@ftp21.eu&gt;
Signed-off-by: Nicolò Veronese &lt;nicveronese@gmail.com&gt;
</content>
</entry>
<entry>
<title>spi: nxp_fspi: reset the FLSHxCR1 registers</title>
<updated>2023-10-10T02:13:51Z</updated>
<author>
<name>Han Xu</name>
<email>han.xu@nxp.com</email>
</author>
<published>2023-09-13T21:15:35Z</published>
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<id>urn:sha1:131e44c5448fb0ba9f8b6084cb848a84d729b2c5</id>
<content type='text'>
Reset the FLSHxCR1 registers to default value. ROM may set the register
value and it affects the SPI NAND normal functions.

Signed-off-by: Han Xu &lt;han.xu@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>common: Drop linux/printk.h from common header</title>
<updated>2023-09-24T13:54:57Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-09-15T00:21:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1e94b46f73cedcebbff73799203f3266c5b28d90'/>
<id>urn:sha1:1e94b46f73cedcebbff73799203f3266c5b28d90</id>
<content type='text'>
This old patch was marked as deferred. Bring it back to life, to continue
towards the removal of common.h

Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>spi: zynqmp_qspi: Workaround for small data cache issue</title>
<updated>2023-09-21T11:20:12Z</updated>
<author>
<name>Venkatesh Yadav Abbarapu</name>
<email>venkatesh.abbarapu@amd.com</email>
</author>
<published>2023-09-15T03:17:59Z</published>
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<id>urn:sha1:a3ade3dae4d93f9b5282ddb4885d69161729ec6d</id>
<content type='text'>
Cache related issues are seen with small sized data reads.
Due to this, proper data is not read. Also some times sf probe
fails randomly. To workaround this issue, invalidate dcache after read DMA
is triggered.

Signed-off-by: Ashok Reddy Soma &lt;ashok.reddy.soma@amd.com&gt;
Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@amd.com&gt;
Link: https://lore.kernel.org/r/20230915031759.28889-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>spi: zynqmp_qspi: Change flush cache to invalidate cache</title>
<updated>2023-09-21T11:20:12Z</updated>
<author>
<name>Ashok Reddy Soma</name>
<email>ashok.reddy.soma@amd.com</email>
</author>
<published>2023-09-15T03:17:58Z</published>
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<id>urn:sha1:638189ddeaa5dccee9466bc772fa5655218f530b</id>
<content type='text'>
Before DMA read, ideally cache should be invalidated, so that data from
memory will be updated to cache after DMA is completed. But
flush_dcache_range is being used which is incorrect. Change
flush_dcache_range to invalidate_dcache_range.

Signed-off-by: Ashok Reddy Soma &lt;ashok.reddy.soma@amd.com&gt;
Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@amd.com&gt;
Link: https://lore.kernel.org/r/20230915031759.28889-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>spi: Remove unused NEEDS_MANUAL_RELOC code bits</title>
<updated>2023-09-14T14:42:25Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2023-09-06T21:30:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b130e034ce993a3cbfcc5d544402aef6d8afd74c'/>
<id>urn:sha1:b130e034ce993a3cbfcc5d544402aef6d8afd74c</id>
<content type='text'>
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8f8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>spi: mtk_spim: clear IRQ enable bits</title>
<updated>2023-08-03T13:40:49Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2023-07-19T09:16:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b43512d0468a7e409fc2a8d5130d5a2efdee1b3f'/>
<id>urn:sha1:b43512d0468a7e409fc2a8d5130d5a2efdee1b3f</id>
<content type='text'>
In u-boot we don't use IRQ. Instead, we poll busy bit in SPI_STATUS.

However these IRQ enable bits may be set in previous boot stage (BootROM).

If we leave these bits not cleared, although u-boot has disabled IRQ and
nothing will happen, the linux kernel may encounter panic during
initializing the spim driver due to IRQ event happens before IRQ handler
is properly setup.

This patch clear IRQ bits to prevent this from happening.

Signed-off-by: SkyLake.Huang &lt;skylake.huang@mediatek.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
</entry>
<entry>
<title>spi: mtk_spim: get spi clk rate only once</title>
<updated>2023-08-03T13:40:49Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2023-07-19T09:15:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=793e6230118032a099ec42a1ea67f434721edcc0'/>
<id>urn:sha1:793e6230118032a099ec42a1ea67f434721edcc0</id>
<content type='text'>
We don't really need to switch clk rate during operating SPIM controller.
Get clk rate only once at driver probing.

Signed-off-by: SkyLake.Huang &lt;skylake.huang@mediatek.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
</entry>
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