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<title>u-boot.git/drivers/spi, branch v2024.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/spi?h=v2024.07</id>
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<updated>2024-05-19T14:16:36Z</updated>
<entry>
<title>Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""</title>
<updated>2024-05-19T14:16:36Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-19T02:20:43Z</published>
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<id>urn:sha1:d678a59d2d719da9e807495b4b021501f2836ca5</id>
<content type='text'>
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>spi: Remove &lt;common.h&gt; and add needed includes</title>
<updated>2024-05-07T14:00:56Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-02T01:31:22Z</published>
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<id>urn:sha1:7d2bf7c266a9d780789a4bfdd5355aa2e6b2d3c5</id>
<content type='text'>
Remove &lt;common.h&gt; from this driver directory and when needed
add missing include files directly.

Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: William Zhang &lt;william.zhang@broadcom.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>spi: npcm_pspi: Reset HW in driver probe</title>
<updated>2024-05-03T18:22:58Z</updated>
<author>
<name>Jim Liu</name>
<email>jim.t90615@gmail.com</email>
</author>
<published>2024-04-23T06:38:42Z</published>
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<id>urn:sha1:914b766a2a6b0f746b2e6fe3bf3d70881e6da610</id>
<content type='text'>
Reset HW to clear old status and use default data mode(8-bit).

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
</content>
</entry>
<entry>
<title>spi: cv1800b: Add spi nor flash controller driver for cv1800b SoC</title>
<updated>2024-05-01T16:01:18Z</updated>
<author>
<name>Kongyang Liu</name>
<email>seashell11234455@gmail.com</email>
</author>
<published>2024-04-20T07:08:23Z</published>
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<id>urn:sha1:6c75bea76a76e2fd21f55107e86696321e427a51</id>
<content type='text'>
Add spi nor flash controller driver for cv1800b SoC

Signed-off-by: Kongyang Liu &lt;seashell11234455@gmail.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>spi: mpc8xx: Set up speed as requested</title>
<updated>2024-04-18T13:47:46Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2024-04-12T17:36:19Z</published>
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<id>urn:sha1:4fb931ed531e7e0a2deb32b392854a118a93ae17</id>
<content type='text'>
Set the speed requested through mpc8xx_spi_set_speed() instead
of hardcoding a fixed speed.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
<entry>
<title>spi: mpc8xx: Use 16 bit mode for large transfers with even size</title>
<updated>2024-04-18T13:47:46Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2024-04-12T16:16:59Z</published>
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<id>urn:sha1:dff36805c7fca1edabf3a8be94a8431928e3aec8</id>
<content type='text'>
On CPM, the RISC core is a lot more efficiant when doing transfers
in 16-bits chunks than in 8-bits chunks, but unfortunately the
words need to be byte swapped.

So, for large tranfers with an even size, allocate a temporary
buffer and byte-swap data before and after transfer.

This change allows setting higher speed for transfer. For instance
on an MPC 8xx (CPM1 comms RISC processor), the documentation tells
that transfer in byte mode at 1 kbit/s uses 0.200% of CPM load
at 25 MHz while a word transfer at the same speed uses 0.032%
of CPM load. This means the speed can be 6 times higher in
word mode for the same CPM load.

For small transfers, the load reduction is not worth the CPU load
required to allocate the temporary buffer, so do it only when data
size is over 64 bytes.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
<entry>
<title>spi: mpc8xx: Allow transfer of more than MAX_BUFFER len</title>
<updated>2024-04-18T13:47:46Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2024-04-12T11:53:57Z</published>
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<id>urn:sha1:244f8461eb270013fe61d17b5029d62fac67e107</id>
<content type='text'>
Perform multiple transfer of size MAX_BUFFER when the data to be
transferred is longer than MAX_BUFFER.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
<entry>
<title>powerpc: 8xx: Set SDMA configuration register correcly</title>
<updated>2024-04-18T13:47:46Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2024-04-12T11:19:47Z</published>
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<id>urn:sha1:dcf7af5fd9af91674ace085663f8b69943a3c61d</id>
<content type='text'>
SDMA configuration register needs to be set up only once and doesn't
belong to drivers. Also, the value to be used is different on mpc885.

So do the init in cpu_init_f() with 0x40 for mpc885 and 0x1 for others.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
<entry>
<title>spi: mpc8xx: Fix transfert when input or output buffer is NULL</title>
<updated>2024-04-18T13:47:46Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2024-04-09T06:38:08Z</published>
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<id>urn:sha1:ea208201a12913e7a5b7b4b38624942effa44c05</id>
<content type='text'>
xfer ops can be passed a NULL input or output buffer. At the
time being the driver ignores it and overwrites memory at 0.

Define a dummy buffer and use it when either input or output
buffer is NULL. Bail out when both are NULL as it shouldn't.

Also increase MAX_BUFFER len to 32k as the current is pretty
low.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
<entry>
<title>spi: mpc8xx: Add GPIO dependency</title>
<updated>2024-04-18T13:47:46Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2024-04-02T17:20:07Z</published>
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<id>urn:sha1:8f58ecf6c328b318187027e1a911a975747b173d</id>
<content type='text'>
Since commit 773ad4ebb1d6 ("spi, mpc8xx: Add support for chipselect via
GPIO and fixups"), DM_GPIO is required for 8xx SPI.

Add the missing dependency to avoid build failures.

Fixes: 773ad4ebb1d6 ("spi, mpc8xx: Add support for chipselect via GPIO and fixups")
Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
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