Add missing prototype to fix the sparse warning,
warning: no previous prototype for 'cadence_qspi_flash_reset'
[-Wmissing-prototypes].
Fixes: 6d234a79e9 ("cadence_qspi: Refactor the flash reset functionality")
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250122135334.1201562-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
If the least significant bit of the address is set to one when using the DDR protocol for data transfer then the results are indeterminate for few flash devices. To fix this the least significant bit of the address is set to zero. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250106095120.800753-1-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
Call spi_mem_default_supports_op() in supports_op to honor the slave's supported single/dual/quad mode settings. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Change devfdt_get_addr_ptr to dev_read_addr_ptr to support DT live tree. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Alexander Dahl <ada@thorsis.com> says: Hello, two patches for header issues I came across when working on (Q)SPI drivers for atmel boards. Link: https://lore.kernel.org/r/20250115161621.1551826-1-ada@thorsis.com
The get_timer function returns an unsigned long which may be calculated
from the ARM system counter. This counter is reset only on a cold reset.
U-boot divides this counter down to a 1000 Hz counter that will cross
the 32bit barrier after a bit more than 49 days. Assigning the value to
an unsigned int will truncate it on 64bit systems.
Passing this truncated value back to the get_timer function will return
a very large value that is certainly larger than the timeout and so will
go down the error path and besides stopping U-Boot will lead to messages
like
"SPI: QSPI is still busy after poll for 5000 ms."
Signed-off-by: Ronald Wahl <ronald.wahl@legrand.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
First try dropping this was with commit 37434db29be4 ("spi: atmel: Drop
atmel_spi.h") back in 2018 which was reverted not much later with commit
5270df283676 ("Revert "spi: atmel: Drop atmel_spi.h"").
Second try dropping this was in 2020 with commit beeb34ac0cc6 ("spi:
atmel: Drop atmel_spi.h"), but that only moved all the definitions into
the source file and did not remove the header file.
Currently all of the definitions in the header file are (still)
contained in the source file, and the header file is include nowhere.
Fixes: beeb34ac0cc6 ("spi: atmel: Drop atmel_spi.h")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Update recent parallel memory support code to move to log_debug instead of debug as per logging in U-Boot documentation Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> Link: https://lore.kernel.org/r/20250107145110.2855213-1-ibai.erkiaga-elorza@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
Prepare v2025.01-rc5
The mxc_get_clock function is around for compatibility with older drivers that are not clock aware. In this case asking for the clk for MXC_CSPI_CLK does not take into account there are multiple SPI busses on modern IMX SoC's and it will return the clock for the first bus which may not be used or configured. In the case you are not using the first bus you will not get the proper clock. Fix this by obtaining the clock rate from the bus clock. This resolves an invalid SPI clock frequency configuration for SPI2 on a board where SPI1 is not used. Signed-off-by: Tim Harvey <tharvey@gateworks.com>