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<title>u-boot.git/drivers/spi, branch v2026.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>spi: cadence: Add driver for xSPI</title>
<updated>2025-12-01T05:57:32+00:00</updated>
<author>
<name>Boon Khai Ng</name>
<email>boon.khai.ng@altera.com</email>
</author>
<published>2025-10-27T06:36:54+00:00</published>
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<id>5eb14e1ea26c22c8994ef6a5013e26eef825c23a</id>
<content type='text'>
This patch ports the Cadence xSPI controller driver from
the Linux kernel. The controller supports three operating modes:

1. ACMD (Auto Command) mode
   - Includes PIO and CDMA submodes.
   - CDMA mode uses linked descriptors for high-performance,
     low-overhead operation.
   - PIO mode is suitable for simple, single-command transactions.

2. STIG (Software Triggered Instruction Generator) mode
   - Issues low-level 128-bit instructions to memory.
   - Uses the Slave DMA interface for data transfers.

3. Direct mode
   - Enables direct data access through the slave interface
     without commands.

Currently, only the STIG work mode is enabled. Additional modes will be
supported in future updates.

At the same time, also enabling the kconfig option for xSPI driver.

This driver has been ported and functionally verified on the Intel Simics
platform. It is intended for evaluation and experimental use at this stage.

Link: https://lore.kernel.org/all/1632038734-23999-1-git-send-email-pthombar@cadence.com/

Signed-off-by: Boon Khai Ng &lt;boon.khai.ng@altera.com&gt;
Reviewed-by: Tien Fong Chee &lt;tien.fong.chee@altera.com&gt;
</content>
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<pre>
This patch ports the Cadence xSPI controller driver from
the Linux kernel. The controller supports three operating modes:

1. ACMD (Auto Command) mode
   - Includes PIO and CDMA submodes.
   - CDMA mode uses linked descriptors for high-performance,
     low-overhead operation.
   - PIO mode is suitable for simple, single-command transactions.

2. STIG (Software Triggered Instruction Generator) mode
   - Issues low-level 128-bit instructions to memory.
   - Uses the Slave DMA interface for data transfers.

3. Direct mode
   - Enables direct data access through the slave interface
     without commands.

Currently, only the STIG work mode is enabled. Additional modes will be
supported in future updates.

At the same time, also enabling the kconfig option for xSPI driver.

This driver has been ported and functionally verified on the Intel Simics
platform. It is intended for evaluation and experimental use at this stage.

Link: https://lore.kernel.org/all/1632038734-23999-1-git-send-email-pthombar@cadence.com/

Signed-off-by: Boon Khai Ng &lt;boon.khai.ng@altera.com&gt;
Reviewed-by: Tien Fong Chee &lt;tien.fong.chee@altera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: airoha: en7523: workaround flash damaging if UART_TXD was short to GND</title>
<updated>2025-11-18T19:07:41+00:00</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-09T07:06:58+00:00</published>
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<id>19548adfe9ea1d12963b3959b8ad2c94a4647878</id>
<content type='text'>
We found that some serial console may pull TX line to GROUND during board
boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
to booting in RESERVED boot mode.

It was found that some flashes operates incorrectly in RESERVED mode.
Micron and Skyhigh flashes are definitely affected by the issue,
Winbond flashes are NOT affected.

Details:
--------
DMA reading of odd pages on affected flashes operates incorrectly. Page
reading offset (start of the page) on hardware level is replaced by 0x10.
Thus results in incorrect data reading. Usage of UBI make things even
worse. Any attempt to access UBI leads to ubi damaging. As result OS loading
becomes impossible.

Non-DMA reading is OK.

This patch detects booting in reserved mode, turn off DMA and print big
fat warning.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
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<pre>
We found that some serial console may pull TX line to GROUND during board
boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
to booting in RESERVED boot mode.

It was found that some flashes operates incorrectly in RESERVED mode.
Micron and Skyhigh flashes are definitely affected by the issue,
Winbond flashes are NOT affected.

Details:
--------
DMA reading of odd pages on affected flashes operates incorrectly. Page
reading offset (start of the page) on hardware level is replaced by 0x10.
Thus results in incorrect data reading. Usage of UBI make things even
worse. Any attempt to access UBI leads to ubi damaging. As result OS loading
becomes impossible.

Non-DMA reading is OK.

This patch detects booting in reserved mode, turn off DMA and print big
fat warning.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: airoha: avoid usage of flash specific parameters</title>
<updated>2025-11-18T19:07:41+00:00</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-09T07:06:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b49b859ecb76bbee8d1eb82f8a8909a5e72e1b50'/>
<id>b49b859ecb76bbee8d1eb82f8a8909a5e72e1b50</id>
<content type='text'>
The spinand driver do 3 type of dirmap requests:
 * read/write whole flash page without oob
   (offs = 0, len = page_size)
 * read/write whole flash page including oob
   (offs = 0, len = page_size + oob_size)
 * read/write oob area only
   (offs = page_size, len = oob_size)

The trick is:
 * read/write a single "sector"
 * set a custom sector size equal to offs + len. It's a bit safer to
   round up "sector size" value 64.
 * set the transfer length equal to custom sector size

And it works!

Thus we can find all data directly from dirmap request, so flash specific
parameters is not needed anymore. Also
 * airoha_snand_nfi_config(),
 * airoha_snand_nfi_setup()
functions becomes unnecessary.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
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<pre>
The spinand driver do 3 type of dirmap requests:
 * read/write whole flash page without oob
   (offs = 0, len = page_size)
 * read/write whole flash page including oob
   (offs = 0, len = page_size + oob_size)
 * read/write oob area only
   (offs = page_size, len = oob_size)

The trick is:
 * read/write a single "sector"
 * set a custom sector size equal to offs + len. It's a bit safer to
   round up "sector size" value 64.
 * set the transfer length equal to custom sector size

And it works!

Thus we can find all data directly from dirmap request, so flash specific
parameters is not needed anymore. Also
 * airoha_snand_nfi_config(),
 * airoha_snand_nfi_setup()
functions becomes unnecessary.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: airoha: set custom sector size equal to flash page size</title>
<updated>2025-11-18T19:07:41+00:00</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-09T07:06:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=269a4d65566a1f3f593f979d5d784c1a7fce4b19'/>
<id>269a4d65566a1f3f593f979d5d784c1a7fce4b19</id>
<content type='text'>
Set custom sector size equal to flash page size including oob. Thus we
will always read a single sector. The maximum custom sector size is
8187, so all possible flash sector sizes are supported.

This patch is a necessary step to avoid usage of flash specific
parameters.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Set custom sector size equal to flash page size including oob. Thus we
will always read a single sector. The maximum custom sector size is
8187, so all possible flash sector sizes are supported.

This patch is a necessary step to avoid usage of flash specific
parameters.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: airoha: reduce the number of modification of REG_SPI_NFI_CNFG and REG_SPI_NFI_SECCUS_SIZE registers</title>
<updated>2025-11-18T19:07:41+00:00</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-09T07:06:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a0f6931c32a3baae9affed76320812ad4fd9e867'/>
<id>a0f6931c32a3baae9affed76320812ad4fd9e867</id>
<content type='text'>
This just reduce the number of modification of REG_SPI_NFI_CNFG and
REG_SPI_NFI_SECCUS_SIZE registers during dirmap operation.

This patch is a necessary step to avoid usage of flash specific
parameters.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
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<pre>
This just reduce the number of modification of REG_SPI_NFI_CNFG and
REG_SPI_NFI_SECCUS_SIZE registers during dirmap operation.

This patch is a necessary step to avoid usage of flash specific
parameters.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: airoha: avoid setting of page/oob sizes in REG_SPI_NFI_PAGEFMT</title>
<updated>2025-11-18T19:07:41+00:00</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-09T07:06:54+00:00</published>
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<id>ad811a6525296955e52c90f555a21c6df6c2a226</id>
<content type='text'>
spi-airoha-snfi uses custom sector size in REG_SPI_NFI_SECCUS_SIZE
register, so setting of page/oob sizes in REG_SPI_NFI_PAGEFMT is not
required.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
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<pre>
spi-airoha-snfi uses custom sector size in REG_SPI_NFI_SECCUS_SIZE
register, so setting of page/oob sizes in REG_SPI_NFI_PAGEFMT is not
required.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: airoha: buffer must be 0xff-ed before writing</title>
<updated>2025-11-18T19:07:41+00:00</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-09T07:06:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2996c2a7a8ea54b942a3bac2fadc0e6120e2d37f'/>
<id>2996c2a7a8ea54b942a3bac2fadc0e6120e2d37f</id>
<content type='text'>
During writing, the entire flash page (including OOB) will be updated
with the values from the temporary buffer, so we need to fill the
untouched areas of the buffer with 0xff value to prevent accidental
data overwriting.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
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<pre>
During writing, the entire flash page (including OOB) will be updated
with the values from the temporary buffer, so we need to fill the
untouched areas of the buffer with 0xff value to prevent accidental
data overwriting.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: airoha: support of dualio/quadio flash reading commands</title>
<updated>2025-11-18T19:07:41+00:00</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-09T07:06:51+00:00</published>
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<id>531e1fe34be024cf2d68843c959ef5f90c8bce64</id>
<content type='text'>
Airoha snfi spi controller supports acceleration of DUAL/QUAD
operations, but does not supports DUAL_IO/QUAD_IO operations.
Luckily DUAL/QUAD operations do the same as DUAL_IO/QUAD_IO ones,
so we can issue corresponding DUAL/QUAD operation instead of
DUAL_IO/QUAD_IO one.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
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<pre>
Airoha snfi spi controller supports acceleration of DUAL/QUAD
operations, but does not supports DUAL_IO/QUAD_IO operations.
Luckily DUAL/QUAD operations do the same as DUAL_IO/QUAD_IO ones,
so we can issue corresponding DUAL/QUAD operation instead of
DUAL_IO/QUAD_IO one.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: airoha: return an error for continuous mode dirmap creation cases</title>
<updated>2025-11-18T19:07:41+00:00</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-09T07:06:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8bd05b632a64673f43ea3368612fa7123a128e17'/>
<id>8bd05b632a64673f43ea3368612fa7123a128e17</id>
<content type='text'>
This driver can accelerate single page operations only, thus
continuous reading mode should not be used.

Continuous reading will use sizes up to the size of one erase block.
This size is much larger than the size of single flash page. Use this
difference to identify continuous reading and return an error.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
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<pre>
This driver can accelerate single page operations only, thus
continuous reading mode should not be used.

Continuous reading will use sizes up to the size of one erase block.
This size is much larger than the size of single flash page. Use this
difference to identify continuous reading and return an error.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: airoha: add dma support</title>
<updated>2025-11-18T19:07:41+00:00</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-09T07:06:49+00:00</published>
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<id>a7c3319bc007469554df8acbace3d41442229fe5</id>
<content type='text'>
This patch speed up cache reading/writing/updating opearions.
It was tested on en7523/an7581 and some other Airoha chips.

It will speed up
 * page reading/writing without oob
 * page reading/writing with oob
 * oob reading/writing (significant for UBI scanning)

The only know issue appears in a very specific conditions for en7523 family
chips only.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch speed up cache reading/writing/updating opearions.
It was tested on en7523/an7581 and some other Airoha chips.

It will speed up
 * page reading/writing without oob
 * page reading/writing with oob
 * oob reading/writing (significant for UBI scanning)

The only know issue appears in a very specific conditions for en7523 family
chips only.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</pre>
</div>
</content>
</entry>
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