u-boot.git/drivers/sysreset, branch v2023.10 Unnamed repository; edit this file 'description' to name the repository. sysreset: Change Kconfig GPIO dependency 2023-07-07T20:47:15+00:00 Michal Simek michal.simek@amd.com 2023-07-04T12:05:13+00:00 99a0532a2d09edac8d8cf59deb68e03f3275e494 DM_GPIO depends on GPIO to be enabled but select will cause that DM_GPIO is selected without GPIO which ends up in compilation error: undefined reference to `dm_gpio_set_value' undefined reference to `dm_gpio_get_value' undefined reference to `dm_gpio_free' undefined reference to `gpio_request_by_name' Signed-off-by: Michal Simek <michal.simek@amd.com> [trini: Fix configs which had relied on these select's] Signed-off-by: Tom Rini <trini@konsulko.com> 
DM_GPIO depends on GPIO to be enabled but select will cause that DM_GPIO is
selected without GPIO which ends up in compilation error:
undefined reference to `dm_gpio_set_value'
undefined reference to `dm_gpio_get_value'
undefined reference to `dm_gpio_free'
undefined reference to `gpio_request_by_name'

Signed-off-by: Michal Simek <michal.simek@amd.com>
[trini: Fix configs which had relied on these select's]
Signed-off-by: Tom Rini <trini@konsulko.com>
x86: sysreset: Set up LPC only after relocation 2023-05-11T02:25:29+00:00 Simon Glass sjg@chromium.org 2023-05-09T10:13:47+00:00 6624392d3bb633fe91b7cc4b75b6eec28f637f72 Probing LPC can cause PCI enumeration to take place, which significantly increases pre-relocation memory usage. Also, LPC is somtimes enabled directly by SPL. Adjust the logic to probe the LPC only after relocation. This allows chromebook_link64 to start up without a much larger CONFIG_SYS_MALLOC_F_LEN value. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Probing LPC can cause PCI enumeration to take place, which significantly
increases pre-relocation memory usage. Also, LPC is somtimes enabled
directly by SPL.

Adjust the logic to probe the LPC only after relocation. This allows
chromebook_link64 to start up without a much larger
CONFIG_SYS_MALLOC_F_LEN value.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
sandbox: mark sandbox_exit() as no return. 2023-04-28T17:30:17+00:00 Heinrich Schuchardt heinrich.schuchardt@canonical.com 2023-04-01T07:54:25+00:00 9963b1f5b80ad3923ff5100a4b91ab1906521ff2 Fix a -Wimplicit-fallthrough warning in sandbox_sysreset_request(). Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
Fix a -Wimplicit-fallthrough warning in sandbox_sysreset_request().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
sysreset: psci: add psci_sysreset_get_status 2023-04-25T19:31:28+00:00 Peng Fan peng.fan@nxp.com 2023-04-06T10:23:19+00:00 6326519f5755bbb72ff2f1b4747236790b5bb980 Add weak function psci_sysreset_get_status for platform to define their own reset status with CONFIG_SYSRESET enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com> 
Add weak function psci_sysreset_get_status for platform to define
their own reset status with CONFIG_SYSRESET enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
sysreset: psci: enable DM_FLAG_PRE_RELOC 2023-04-25T19:31:28+00:00 Peng Fan peng.fan@nxp.com 2023-04-06T10:23:18+00:00 439b9383ee1a22ffb589e007745ffbeaf7806465 It is possible that cpu core may reset before relocation with PSCI reset Signed-off-by: Peng Fan <peng.fan@nxp.com> 
It is possible that cpu core may reset before relocation with PSCI reset

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Merge branch 'next' 2023-04-03T20:45:41+00:00 Tom Rini trini@konsulko.com 2023-04-03T20:45:41+00:00 288fe30a2367b8d0e3f416493150a38ebaa88459 Signed-off-by: Tom Rini <trini@konsulko.com> 
Signed-off-by: Tom Rini <trini@konsulko.com>
sysreset: gpio: fix gpio_reboot_request return value 2023-03-30T19:32:52+00:00 Jonathan Liu net147@gmail.com 2023-03-28T06:44:23+00:00 a47164dfc1ef899ef9ddc6d8f2a17f0e9e90ef34 It should return -EINPROGRESS if successful otherwise sysreset-uclass will continue to the next sysreset device. Signed-off-by: Jonathan Liu <net147@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
It should return -EINPROGRESS if successful otherwise sysreset-uclass
will continue to the next sysreset device.

Signed-off-by: Jonathan Liu <net147@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Correct SPL uses of DISPLAY_AER_FULL 2023-03-02T22:45:57+00:00 Simon Glass sjg@chromium.org 2023-02-22T16:33:48+00:00 1be3077e714bfdb8fb7a6cfb78fec1e71111d57c This converts 2 usages of this option to the non-SPL form, since there is no SPL_DISPLAY_AER_FULL defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> 
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_DISPLAY_AER_FULL defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Correct SPL uses of DISPLAY_AER_BRIEF 2023-02-10T12:41:41+00:00 Simon Glass sjg@chromium.org 2023-02-06T00:53:52+00:00 1b81aed125e0cfa87f0938066df221088d3f0603 This converts 2 usages of this option to the non-SPL form, since there is no SPL_DISPLAY_AER_BRIEF defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> 
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_DISPLAY_AER_BRIEF defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
sysreset: at91: Correct Makefile rule for SYSRESET_AT91 2023-02-07T19:33:49+00:00 Simon Glass sjg@chromium.org 2023-02-01T20:20:10+00:00 00035c240f9de6dd26535f75c41fcdb4b99b1b33 The SPL_TPL part is in the wrong place. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 71d4393f846 ("sysreset: Add Atmel/Microchip sysreset driver") Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> 
The SPL_TPL part is in the wrong place. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 71d4393f846 ("sysreset: Add Atmel/Microchip sysreset driver")
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>