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<title>u-boot.git/drivers/timer/Kconfig, branch v2022.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>timer: npcm: Add NPCM timer support</title>
<updated>2022-05-05T13:28:47+00:00</updated>
<author>
<name>Jim Liu</name>
<email>jim.t90615@gmail.com</email>
</author>
<published>2022-04-19T05:32:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b789e4f215614e3aee2f78925683dc722ca617fc'/>
<id>b789e4f215614e3aee2f78925683dc722ca617fc</id>
<content type='text'>
Add Nuvoton BMC NPCM7xx/NPCM8xx timer driver.

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
Signed-off-by: Stanley Chu &lt;yschu@nuvoton.com&gt;
</content>
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<pre>
Add Nuvoton BMC NPCM7xx/NPCM8xx timer driver.

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
Signed-off-by: Stanley Chu &lt;yschu@nuvoton.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>vpl: Add Kconfig options for VPL</title>
<updated>2022-05-02T13:58:13+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2022-04-30T06:56:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=747093dd4089bdb2eccae90d7bccf33198e78eaa'/>
<id>747093dd4089bdb2eccae90d7bccf33198e78eaa</id>
<content type='text'>
Add VPL versions of commonly used Kconfig options.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add VPL versions of commonly used Kconfig options.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>timers: atmel_pit: introduce CONFIG_SPL_ATMEL_PIT_TIMER</title>
<updated>2022-04-26T06:54:41+00:00</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@microchip.com</email>
</author>
<published>2022-04-04T08:35:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=632422d4b333f3580b9fd28c424ff728ed3d3bad'/>
<id>632422d4b333f3580b9fd28c424ff728ed3d3bad</id>
<content type='text'>
This commit allows the ATMEL_PIT_TIMER driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 0.3 KBytes.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</content>
<content type='xhtml'>
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<pre>
This commit allows the ATMEL_PIT_TIMER driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 0.3 KBytes.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>timers: atmel_tcb: introduce CONFIG_SPL_ATMEL_TCB</title>
<updated>2022-04-26T06:53:49+00:00</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@microchip.com</email>
</author>
<published>2022-04-04T08:35:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e135d2c2f385fc1cefcea64cf775c6f0267945a2'/>
<id>e135d2c2f385fc1cefcea64cf775c6f0267945a2</id>
<content type='text'>
This commit allows the ATMEL_TCB driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 1 KByte.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This commit allows the ATMEL_TCB driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 1 KByte.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: Remove the architecture</title>
<updated>2022-04-25T20:04:05+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-04-06T13:21:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=11232139e399e70641410356ae6b278113d90f16'/>
<id>11232139e399e70641410356ae6b278113d90f16</id>
<content type='text'>
As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen &lt;rick@andestech.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
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<pre>
As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen &lt;rick@andestech.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>timer: atmel_tcb_timer: add atmel_tcb driver</title>
<updated>2022-04-01T12:42:46+00:00</updated>
<author>
<name>Clément Léger</name>
<email>clement.leger@bootlin.com</email>
</author>
<published>2022-03-31T08:55:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=70fb1ae9dd30b1dc6cf0c6ba585f822ef58106e5'/>
<id>70fb1ae9dd30b1dc6cf0c6ba585f822ef58106e5</id>
<content type='text'>
Add a driver for the timer counter block that can be found on sama5d2.
This driver will be used when booting under OP-TEE since the pit timer
which is part of the SYSC is secured. Channel 1 &amp; 2 are configured to
be chained together which allows to have a 64bits counter.

Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Signed-off-by: Clément Léger &lt;clement.leger@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a driver for the timer counter block that can be found on sama5d2.
This driver will be used when booting under OP-TEE since the pit timer
which is part of the SYSC is secured. Channel 1 &amp; 2 are configured to
be chained together which allows to have a 64bits counter.

Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Signed-off-by: Clément Léger &lt;clement.leger@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: tsc: Rename X86_TSC_TIMER_EARLY_FREQ to X86_TSC_TIMER_FREQ</title>
<updated>2021-08-02T07:11:40+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2021-07-28T04:00:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5824bc6d6fe5f63aa1fb9acbe5ad5aa28d77380f'/>
<id>5824bc6d6fe5f63aa1fb9acbe5ad5aa28d77380f</id>
<content type='text'>
Currently there are two places to specify the x86 TSC timer frequency
with one in Kconfig used for early timer and the other one in device
tree used when the frequency cannot be determined from hardware.

This may potentially create an inconsistent config where the 2 values
do not match. Let's use the one specified in Kconfig in the device
tree as well.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently there are two places to specify the x86 TSC timer frequency
with one in Kconfig used for early timer and the other one in device
tree used when the frequency cannot be determined from hardware.

This may potentially create an inconsistent config where the 2 values
do not match. Let's use the one specified in Kconfig in the device
tree as well.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>timer: imx-gpt: Add timer support for i.MX SoCs family</title>
<updated>2021-06-09T11:01:33+00:00</updated>
<author>
<name>Giulio Benetti</name>
<email>giulio.benetti@benettiengineering.com</email>
</author>
<published>2021-05-13T10:18:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f8c8573b85765f60d4c4ef022a1fc57bbb2dd704'/>
<id>f8c8573b85765f60d4c4ef022a1fc57bbb2dd704</id>
<content type='text'>
This timer driver uses GPT Timer (General Purpose Timer) available on
a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator
as well as peripheral clock.

Signed-off-by: Giulio Benetti &lt;giulio.benetti@benettiengineering.com&gt;
[Giulio: added the driver's stub and handled peripheral clock prescaler
setting making driver to work correctly]
Signed-off-by: Jesse Taube &lt;mr.bossman075@gmail.com&gt;
[Jesse: added init, setting prescaler for 24Mhz support and enabling
timer]
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This timer driver uses GPT Timer (General Purpose Timer) available on
a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator
as well as peripheral clock.

Signed-off-by: Giulio Benetti &lt;giulio.benetti@benettiengineering.com&gt;
[Giulio: added the driver's stub and handled peripheral clock prescaler
setting making driver to work correctly]
Signed-off-by: Jesse Taube &lt;mr.bossman075@gmail.com&gt;
[Jesse: added init, setting prescaler for 24Mhz support and enabling
timer]
</pre>
</div>
</content>
</entry>
<entry>
<title>timer: Add _TIMER suffix to Andes PLMT Kconfig</title>
<updated>2020-10-26T02:01:28+00:00</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-10-26T01:46:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7dbebebb7949655f35d90c612eaf92e3d2c9ed24'/>
<id>7dbebebb7949655f35d90c612eaf92e3d2c9ed24</id>
<content type='text'>
This matches the naming scheme of other timer drivers.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
<content type='xhtml'>
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<pre>
This matches the naming scheme of other timer drivers.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>riscv: Move Andes PLMT driver to drivers/timer</title>
<updated>2020-10-26T02:01:28+00:00</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-10-26T01:46:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=79b135f1f937296fbe40ffa8500b531a7e1a0e9d'/>
<id>79b135f1f937296fbe40ffa8500b531a7e1a0e9d</id>
<content type='text'>
This is a regular timer driver, and should live with the other timer
drivers.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is a regular timer driver, and should live with the other timer
drivers.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</pre>
</div>
</content>
</entry>
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