u-boot.git/drivers/timer, branch v2023.01-rc2 Unnamed repository; edit this file 'description' to name the repository. Merge branch '2022-11-02-assorted-updates' 2022-11-03T12:29:10+00:00 Tom Rini trini@konsulko.com 2022-11-03T12:29:10+00:00 36bc9b6113ca96ca5c0d821195adede38395befd - Improve arm semihosting, NPCM8xx pinctrl driver, SP804 uclass timer driver (and enable on relevant platforms), pvblock cleanup, eeprom cmd bugfix, add RTI watchdog nodes to k3-am64-main, evb-ast2500 config updates. 
- Improve arm semihosting, NPCM8xx pinctrl driver, SP804 uclass timer
  driver (and enable on relevant platforms), pvblock cleanup, eeprom cmd
  bugfix, add RTI watchdog nodes to k3-am64-main, evb-ast2500 config
  updates.
riscv: Rename Andes PLIC to PLICSW 2022-11-03T05:27:56+00:00 Yu Chien Peter Lin peterlin@andestech.com 2022-10-25T15:03:50+00:00 a5dfa3b8a0f7ad555495bad1386613d2de4ba619 As PLICSW is used to trigger the software interrupt, we should rename Andes PLIC configuration and file name to reflect the usage. This patch also updates PLMT and PLICSW compatible strings to be consistent with OpenSBI fdt driver. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com> 
As PLICSW is used to trigger the software interrupt, we should rename
Andes PLIC configuration and file name to reflect the usage. This patch
also updates PLMT and PLICSW compatible strings to be consistent with
OpenSBI fdt driver.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
timer: add SP804 UCLASS timer driver 2022-11-02T17:58:17+00:00 Andre Przywara andre.przywara@arm.com 2022-10-20T22:10:23+00:00 731d108dd0706e76addc6945e8c8709a05cb4728 The "Arm Ltd. Dual-Timer Module (SP804)" is a simple 32-bit count-down timer IP with interrupt functionality, and is used in some SoCs from various vendors. Add a simple DM compliant timer driver, to allow users of the SP804 to switch to DM_TIMER. This relies on the input clock to be accessible via the DM clock framework, which should be fine as we probably look at fixed-clock's here anyway. We re-program the control register in the probe() function, but keep the divider in place, in case this has been set to something on purpose before. The TRM for the timer IP can be found here: https://developer.arm.com/documentation/ddi0271/latest Signed-off-by: Andre Przywara <andre.przywara@arm.com> 
The "Arm Ltd. Dual-Timer Module (SP804)" is a simple 32-bit count-down
timer IP with interrupt functionality, and is used in some SoCs from
various vendors.

Add a simple DM compliant timer driver, to allow users of the SP804 to
switch to DM_TIMER.

This relies on the input clock to be accessible via the DM clock
framework, which should be fine as we probably look at fixed-clock's
here anyway.
We re-program the control register in the probe() function, but keep
the divider in place, in case this has been set to something on purpose
before.

The TRM for the timer IP can be found here:
https://developer.arm.com/documentation/ddi0271/latest

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
timer: sti: convert sti-timer to arm a9 global timer 2022-10-31T12:55:59+00:00 William Zhang william.zhang@broadcom.com 2022-08-24T04:44:32+00:00 35751c7f3f01a6123e2965ad1b71a8e6a7a9c90d STI timer is actually ARM Cortex A9 global timer. Convert the driver to use generic global timer name and make it consistent with Linux kernel global timer driver. This also allows any A9 based device to use this driver. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> 
STI timer is actually ARM Cortex A9 global timer. Convert the driver to
use generic global timer name and make it consistent with Linux kernel
global timer driver. This also allows any A9 based device to use this
driver.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
timer: orion-timer: Only init timer once 2022-10-06T08:15:35+00:00 Stefan Roese sr@denx.de 2022-09-21T06:26:42+00:00 37bb396669b27aa62fe8bc5eeb6bfde92e09c2d3 Move the code making sure that the timer is initialized only once into orion_timer_init(), which is called from timer_early_init() and from orion_timer_probe(). This way the timer is not re-initialized. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Michael Walle <michael@walle.cc> Cc: Pali Rohár <pali@kernel.org> 
Move the code making sure that the timer is initialized only once into
orion_timer_init(), which is called from timer_early_init() and from
orion_timer_probe(). This way the timer is not re-initialized.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michael Walle <michael@walle.cc>
Cc: Pali Rohár <pali@kernel.org>
timer: mtk: add support for MediaTek MT7981/MT7986 SoCs 2022-09-23T19:09:15+00:00 Weijie Gao weijie.gao@mediatek.com 2022-09-09T11:59:41+00:00 980e107d0f353a24cd4dcf3466cea068ec5e2eed This patch add general-purpose timer support for MediaTek MT7981/MT7986. These two SoCs uses a newer version of timer with its register definition slightly changed. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> 
This patch add general-purpose timer support for MediaTek MT7981/MT7986.
These two SoCs uses a newer version of timer with its register definition
slightly changed.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
timer: orion-timer: Add timer_get_boot_us() for BOOTSTAGE support 2022-09-20T04:39:43+00:00 Stefan Roese sr@denx.de 2022-09-15T14:20:38+00:00 a68f13a3b6b4995ba5d0ad929eb9b79dc2a0a8c3 Add timer_get_boot_us() to support boards, that have CONFIG_BOOTSTAGE enabled, like pogo_v4. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Tony Dinh <mibodhi@gmail.com> 
Add timer_get_boot_us() to support boards, that have CONFIG_BOOTSTAGE
enabled, like pogo_v4.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
timer: orion-timer: Add support for other Armada SoC's 2022-09-20T04:39:43+00:00 Stefan Roese sr@denx.de 2022-09-15T14:20:37+00:00 89fd0cccf9cff1537567b63eaa7a33110bd43a2c This patch adds support for other Marvell Armada SoC's, supporting the 25MHz fixed clock operation, like the Armada XP etc. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Tony Dinh <mibodhi@gmail.com> 
This patch adds support for other Marvell Armada SoC's, supporting the
25MHz fixed clock operation, like the Armada XP etc.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Merge branch 'master' into next 2022-09-19T20:07:12+00:00 Tom Rini trini@konsulko.com 2022-09-19T17:19:39+00:00 e9a1ff9724348408144c7f1c5b5cc26130ba46e5 Signed-off-by: Tom Rini <trini@konsulko.com> 
Signed-off-by: Tom Rini <trini@konsulko.com>
timer: orion-timer: Use timer_conv_64() to fix timer wrap around 2022-09-18T10:41:57+00:00 Stefan Roese sr@denx.de 2022-09-15T14:20:36+00:00 5996a8a8356c11c6eb504eeea93c267f9adbf53c While testing on some Kirkwood platforms it was noticed that the timer did not function correctly all the time. The driver did not correctly handle 32bit timer value wrap arounds. Using the timer_conv_64() conversion function fixes this issue. Fixes: e9e73d78a8fb ("timer: add orion-timer support") Suggested-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier-oss@weidmueller.com> Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Tony Dinh <mibodhi@gmail.com> 
While testing on some Kirkwood platforms it was noticed that the timer
did not function correctly all the time. The driver did not correctly
handle 32bit timer value wrap arounds. Using the timer_conv_64()
conversion function fixes this issue.

Fixes: e9e73d78a8fb ("timer: add orion-timer support")
Suggested-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier-oss@weidmueller.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>