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<title>u-boot.git/drivers/timer, branch v2025.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>powerpc: mpc83xx: Fix timer value calculation</title>
<updated>2024-12-30T21:55:27+00:00</updated>
<author>
<name>J. Neuschäfer</name>
<email>j.ne@posteo.net</email>
</author>
<published>2024-12-20T10:37:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=deb26b6c29670dee743dfb54b8f69866339580bd'/>
<id>deb26b6c29670dee743dfb54b8f69866339580bd</id>
<content type='text'>
TBU and TBL are specified as two 32-bit registers that form a 64-bit
value, but the calculation only shifted TBU by 16 bits.

Fix this by actually shifting 32 bits.

Reviewed-by: Sinan Akman &lt;sinan@writeme.com&gt;
Signed-off-by: J. Neuschäfer &lt;j.ne@posteo.net&gt;
</content>
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<pre>
TBU and TBL are specified as two 32-bit registers that form a 64-bit
value, but the calculation only shifted TBU by 16 bits.

Fix this by actually shifting 32 bits.

Reviewed-by: Sinan Akman &lt;sinan@writeme.com&gt;
Signed-off-by: J. Neuschäfer &lt;j.ne@posteo.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Sync up tsc_timer with Linux</title>
<updated>2024-10-18T20:10:21+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-08-28T01:44:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ecf31113f17817f5ab9263937270255b6d05cdf9'/>
<id>ecf31113f17817f5ab9263937270255b6d05cdf9</id>
<content type='text'>
Since we are using the code from Linux, update it to the newer version
in v6.11

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Since we are using the code from Linux, update it to the newer version
in v6.11

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Avoid timer-clock overflow</title>
<updated>2024-10-18T20:10:21+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-08-28T01:44:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7c0f70b65b7c6ab0c09f87932615c65142542ed5'/>
<id>7c0f70b65b7c6ab0c09f87932615c65142542ed5</id>
<content type='text'>
When the clock speed is above about 4GHz, e.g. on modern PC hardware,
the timer overflows, resulting in a much lower frequency than expected.
Deal with this by capping the clock speed.

It would be possible to move to a 64-bit value for the clock, but that
is a pain to deal with. A better approach might be to express the clock
in MHz but that is left for later consideration.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
When the clock speed is above about 4GHz, e.g. on modern PC hardware,
the timer overflows, resulting in a much lower frequency than expected.
Deal with this by capping the clock speed.

It would be possible to move to a 64-bit value for the clock, but that
is a pain to deal with. A better approach might be to express the clock
in MHz but that is left for later consideration.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Ensure the CPU identity exists for timer init</title>
<updated>2024-10-18T20:10:21+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-08-28T01:44:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3b2e4f542e3ea5d116d5830f4eef9be97d872312'/>
<id>3b2e4f542e3ea5d116d5830f4eef9be97d872312</id>
<content type='text'>
When bootstage is used the timer can be inited before the CPU identity
is set up, resulting in the checks for the vendor not working.

Add a special call to work around this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
When bootstage is used the timer can be inited before the CPU identity
is set up, resulting in the checks for the vendor not working.

Add a special call to work around this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>global: Rename SPL_ to XPL_</title>
<updated>2024-10-11T17:44:48+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c46760d5967d12b6f7d37402878d1607a98b2b84'/>
<id>c46760d5967d12b6f7d37402878d1607a98b2b84</id>
<content type='text'>
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>timer: Add AST2700 IBEX timer support</title>
<updated>2024-09-11T12:35:03+00:00</updated>
<author>
<name>Chia-Wei Wang</name>
<email>chiawei_wang@aspeedtech.com</email>
</author>
<published>2024-09-10T09:39:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4b0129e8103dab9887d495d9c4dface8eeefb10b'/>
<id>4b0129e8103dab9887d495d9c4dface8eeefb10b</id>
<content type='text'>
Add the driver for the AST2700 Ibex timer, which uses CPU
cycles as the timer count running at 200MHz.

Signed-off-by: Chia-Wei Wang &lt;chiawei_wang@aspeedtech.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
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<pre>
Add the driver for the AST2700 Ibex timer, which uses CPU
cycles as the timer count running at 200MHz.

Signed-off-by: Chia-Wei Wang &lt;chiawei_wang@aspeedtech.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>timer: npcm: Change counter source</title>
<updated>2024-08-27T21:37:18+00:00</updated>
<author>
<name>Jim Liu</name>
<email>jim.t90615@gmail.com</email>
</author>
<published>2024-07-29T09:04:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b70865e6b94fe81ddc4eb48f45b574eae80ee035'/>
<id>b70865e6b94fe81ddc4eb48f45b574eae80ee035</id>
<content type='text'>
The counter value read from TDR register may not be correct.
Read SECCNT and CNTR25M instead to get the correct timestamp.

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
</content>
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<pre>
The counter value read from TDR register may not be correct.
Read SECCNT and CNTR25M instead to get the correct timestamp.

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: timer: Remove duplicate newlines</title>
<updated>2024-07-22T16:53:06+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2024-07-20T12:41:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6478e02b2a5734d22e0137139eb30964a7a57798'/>
<id>6478e02b2a5734d22e0137139eb30964a7a57798</id>
<content type='text'>
Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
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<pre>
Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>timer: mtk: skip setting parent with dummy fixed-clock</title>
<updated>2024-07-18T13:40:30+00:00</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2024-07-06T16:13:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f02269b76bc25a7c9332ae8630ba407cb62f9ec'/>
<id>0f02269b76bc25a7c9332ae8630ba407cb62f9ec</id>
<content type='text'>
Skip setting parent with dummy fixed-clock. Upstream linux might declare
an additional clock for the mtk timer and that additional clock might
also be a fixed-clock defined in DT. Setting parent of a dummy fixed-clock
resulta in error hence mtk timer fails to probe.

Skip setting parent to permit correct probe of the mtk timer.

Fixes: d3c3606c5cc6 ("timer: MediaTek: add timer driver for MediaTek SoCs")
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</content>
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<pre>
Skip setting parent with dummy fixed-clock. Upstream linux might declare
an additional clock for the mtk timer and that additional clock might
also be a fixed-clock defined in DT. Setting parent of a dummy fixed-clock
resulta in error hence mtk timer fails to probe.

Skip setting parent to permit correct probe of the mtk timer.

Fixes: d3c3606c5cc6 ("timer: MediaTek: add timer driver for MediaTek SoCs")
Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"</title>
<updated>2024-05-20T19:35:03+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-20T19:35:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=03de305ec48b0bb28554372abb40ccd46dbe0bf9'/>
<id>03de305ec48b0bb28554372abb40ccd46dbe0bf9</id>
<content type='text'>
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
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