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<title>u-boot.git/drivers/ufs, branch next</title>
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<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ufs?h=next</id>
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<updated>2026-08-12T04:55:15Z</updated>
<entry>
<title>ufs: amd-versal2: Remove ZYNQMP_FIRMWARE dependency</title>
<updated>2026-08-12T04:55:15Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2026-07-30T06:49:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fafbcbdc977a7cc9cd686642a15935966500c05a'/>
<id>urn:sha1:fafbcbdc977a7cc9cd686642a15935966500c05a</id>
<content type='text'>
There are EEMI firmware hooks available but they are also IO versions of it
that's why remove ZYNQMP_FIRMWARE depency from UFS driver.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://patch.msgid.link/85cbacdc7492890c76396974d24fff607c2088ad.1785394153.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>xilinx: versal2: Clean UFS firmware interface</title>
<updated>2026-08-12T04:55:15Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2026-07-30T06:49:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f2294a98b28627b7b2075d5d19d2909de6b27667'/>
<id>urn:sha1:f2294a98b28627b7b2075d5d19d2909de6b27667</id>
<content type='text'>
The M-PHY and SRAM readiness poll loops move out of the UFS controller
driver and into the firmware backend, exposed as blocking waits with
a caller-owned timeout budget. This keeps the UFS driver backend-agnostic
and lets an other backends offload the wait to the platform in a single
call instead of round-tripping every poll.

set_sram_bypass() now performs the SRAM_CSR read-modify-write in the
firmware layer.

Hook up functions are also update to reflect their usage.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://patch.msgid.link/26bc9aa2c02921690e126ab3401f7974ef04ad6e.1785394153.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>ufs: amd-versal2: Perform controller reset in the init callback</title>
<updated>2026-08-12T04:55:14Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2026-07-30T06:49:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9e8a0f54b0231d11e481fbf7832a8780e6201b71'/>
<id>urn:sha1:9e8a0f54b0231d11e481fbf7832a8780e6201b71</id>
<content type='text'>
Move the controller/PHY reset and SRAM-bypass sequence from
hce_enable_notify(PRE_CHANGE) into ufs_versal2_init().
The reset sequence releases the host controller from reset, and the UFS
core reads the capability and version registers right after .init() and
before ufshcd_hba_enable() (the only caller of hce_enable_notify()).
Doing the reset in .init() ensures those registers are read after the
controller is out of reset, and keeps the driver aligned with Linux.
ufs_versal2_phy_init() stays in POST_CHANGE.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://patch.msgid.link/6b4cbfa6cc58bef86da86971e4b27726a4e510f0.1785394153.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>xilinx: versal2: Add PM UFS firmware interface</title>
<updated>2026-08-12T04:55:14Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2026-07-24T05:25:13Z</published>
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<id>urn:sha1:661b6e44a446953b472679345ced92a2bb68c4f9</id>
<content type='text'>
Add firmware interface for UFS access but also keep IO interface when
firmware is not enabled.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://patch.msgid.link/6419fe4f6f1f451aee624c7762b7aa690d50e498.1784870711.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>ufs: rcar-gen5: Switch from FASTAUTO mode to FAST mode</title>
<updated>2026-08-07T19:58:59Z</updated>
<author>
<name>Tuyen Dang</name>
<email>tuyen.dang.xa@renesas.com</email>
</author>
<published>2026-08-02T22:25:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=844e134e9d21f657e0b69945cb2523d988da9bf2'/>
<id>urn:sha1:844e134e9d21f657e0b69945cb2523d988da9bf2</id>
<content type='text'>
Switch from FASTAUTO to FAST mode and lane 2 to achieve
higher throughput. Drop the 64bit address quirk.

Signed-off-by: Tuyen Dang &lt;tuyen.dang.xa@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>ufs: invalidate the whole descriptor data segment after a query read</title>
<updated>2026-07-21T07:22:58Z</updated>
<author>
<name>Jorge Ramirez-Ortiz</name>
<email>jorge.ramirez@oss.qualcomm.com</email>
</author>
<published>2026-07-17T09:30:07Z</published>
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<id>urn:sha1:38bfdf0a770219e2f753023998bc9d0b45254785</id>
<content type='text'>
ufshcd_get_req_rsp() invalidates only sizeof(struct utp_upiu_rsp) of the
DMA'd response, but a READ DESCRIPTOR response's data segment follows the
UPIU header at GENERAL_UPIU_REQUEST_SIZE and can extend past that window.
The tail of a longer descriptor was therefore read from stale cache (the
pre-transfer memset had zeroed it), so its last bytes came back as 0.

This corrupted the last UTF-16 code unit of longer string descriptors:
e.g. a 34-byte product-name descriptor "THGJFGT0T25BAZZA" was read as
"THGJFGT0T25BAZZ\0", dropping the final 'A'. Shorter descriptors that fit
within the invalidated cache line (serial numbers, etc.) were unaffected.

Invalidate the descriptor region before copying it out.

Tested on the Qualcomm IQ-9075-EVK.

Fixes: 7feafb0ae4f7 ("ufs: Add Initial Support for UFS subsystem")
Signed-off-by: Jorge Ramirez-Ortiz &lt;jorge.ramirez@oss.qualcomm.com&gt;
Reviewed-by: Neha Malcom Francis &lt;n-francis@ti.com&gt;
Link: https://patch.msgid.link/20260717093013.3253643-1-jorge.ramirez@oss.qualcomm.com
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</content>
</entry>
<entry>
<title>treewide: Kconfig: use bool instead of tristate</title>
<updated>2026-07-10T21:45:57Z</updated>
<author>
<name>Anshul Dalal</name>
<email>anshuld@ti.com</email>
</author>
<published>2026-06-25T03:17:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=199a088b96c9d352cffa59ce4043e5ac60917697'/>
<id>urn:sha1:199a088b96c9d352cffa59ce4043e5ac60917697</id>
<content type='text'>
U-Boot does not support modules, so having tristate options is useless.

Therefore this patch does a blind replace of all tristate options to
bool tree-wide.

Signed-off-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@nabladev.com&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Reviewed-by: Neha Malcom Francis &lt;n-francis@ti.com&gt;
Reviewed-by: Romain Gantois &lt;romain.gantois@bootlin.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ufs: amd-versal2: Fix missing .priv_auto in driver registration</title>
<updated>2026-07-08T06:55:51Z</updated>
<author>
<name>Pranav Tilak</name>
<email>pranav.vinaytilak@amd.com</email>
</author>
<published>2026-06-23T03:53:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f436398f469b20a822ee84aab96ff6594a5fbd0c'/>
<id>urn:sha1:f436398f469b20a822ee84aab96ff6594a5fbd0c</id>
<content type='text'>
Add missing .priv_auto field to the driver. Without it,
struct ufs_versal2_priv is never properly allocated and dev_get_priv()
returns NULL, leading to DDR corruption at low DDR addresses.

Fixes: b5ac5f030720 ("ufs: ufs-amd-versal2: Add support for AMD UFS controller")
Signed-off-by: Pranav Tilak &lt;pranav.vinaytilak@amd.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/20260623035411.2088224-1-pranav.vinaytilak@amd.com
</content>
</entry>
<entry>
<title>Kconfig: drivers: restyle remaining</title>
<updated>2026-06-25T21:00:58Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-06-10T14:41:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=145d58e2c7276f68195a7fc760457a5b88f867dd'/>
<id>urn:sha1:145d58e2c7276f68195a7fc760457a5b88f867dd</id>
<content type='text'>
Restyle all Kconfigs for the rest of "drivers":
Menu entries   : no space left
Menu attributes: 1 TAB
Help text      : 1 TAB + 2 spaces
Replace '---help---' by 'help'

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
[trini: Add missing indentation on a few more multi-paragraph help texts]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>ufs: qcom: Remove redundant POST_CHANGE clock setup call</title>
<updated>2026-05-18T09:04:14Z</updated>
<author>
<name>Balaji Selvanathan</name>
<email>balaji.selvanathan@oss.qualcomm.com</email>
</author>
<published>2026-04-27T09:26:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6d2bcb6398cf3b7caa9e80add7c49e28a1e9a6c6'/>
<id>urn:sha1:6d2bcb6398cf3b7caa9e80add7c49e28a1e9a6c6</id>
<content type='text'>
The ufs_qcom_init() function was calling ufs_qcom_setup_clocks() with
POST_CHANGE twice. The first call after setting PA_TXHSADAPTTYPE
correctly enables the device reference clock. The second call after
ufs_qcom_advertise_quirks() is redundant as the clock is already
enabled.

Signed-off-by: Balaji Selvanathan &lt;balaji.selvanathan@oss.qualcomm.com&gt;
Reviewed-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Reviewed-by: Neha Malcom Francis &lt;n-francis@ti.com&gt;
Reviewed-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Link: https://patch.msgid.link/20260427-ufs_clk-v2-7-36e10a7c0ef6@oss.qualcomm.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
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