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<title>u-boot.git/drivers/usb/dwc3/core.c, branch v2018.03</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/usb/dwc3/core.c?h=v2018.03</id>
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<updated>2017-04-14T14:44:16Z</updated>
<entry>
<title>usb: dwc3: gadget: make cache-maintenance on event buffers more robust</title>
<updated>2017-04-14T14:44:16Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-04-06T14:58:53Z</published>
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<id>urn:sha1:889239d6b5c15c82d507498ded5e3b8fea2d44cf</id>
<content type='text'>
Merely using dma_alloc_coherent does not ensure that there is no stale
data left in the caches for the allocated DMA buffer (i.e. that the
affected cacheline may still be dirty).

The original code was doing the following (on AArch64, which
translates a 'flush' into a 'clean + invalidate'):
  # during initialisation:
      1. allocate buffers via memalign
      	 =&gt; buffers may still be modified (cached, dirty)
  # during interrupt processing
      2. clean + invalidate buffers
      	 =&gt; may commit stale data from a modified cacheline
      3. read from buffers

This could lead to garbage info being written to buffers before
reading them during even-processing.

To make the event processing more robust, we use the following sequence
for the cache-maintenance:
  # during initialisation:
      1. allocate buffers via memalign
      2. clean + invalidate buffers
      	 (we only need the 'invalidate' part, but dwc3_flush_cache()
	  always performs a 'clean + invalidate')
  # during interrupt processing
      3. read the buffers
      	 (we know these lines are not cached, due to the previous
	  invalidation and no other code touching them in-between)
      4. clean + invalidate buffers
      	 =&gt; writes back any modification we may have made during event
	    processing and ensures that the lines are not in the cache
	    the next time we enter interrupt processing

Note that with the original sequence, we observe reproducible
(depending on the cache state: i.e. running dhcp/usb start before will
upset caches to get us around this) issues in the event processing (a
fatal synchronous abort in dwc3_gadget_uboot_handle_interrupt on the
first time interrupt handling is invoked) when running USB mass
storage emulation on our RK3399-Q7 with data-caches on.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: fix build warnings</title>
<updated>2015-12-06T23:14:59Z</updated>
<author>
<name>Felipe Balbi</name>
<email>balbi@ti.com</email>
</author>
<published>2015-10-01T19:22:18Z</published>
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<id>urn:sha1:c2ad4e1b9f965d4ee4a5630216ba4123a77e1784</id>
<content type='text'>
fix the following build warnings:

drivers/usb/dwc3/core.c: In function ‘dwc3_uboot_init’:
drivers/usb/dwc3/core.c:625:6: warning: ‘dev’ is used uninitialized in this function [-Wuninitialized]
mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
        ^
drivers/usb/dwc3/dwc3-omap.c: In function ‘dwc3_omap_uboot_init’:
drivers/usb/dwc3/dwc3-omap.c:380:7: warning: ‘dev’ is used uninitialized in this function [-Wuninitialized]
omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL);

Signed-off-by: Felipe Balbi &lt;balbi@ti.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: Fix warnings on 64-bit builds</title>
<updated>2015-11-03T16:29:54Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2015-10-30T15:24:06Z</published>
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<id>urn:sha1:01c94c4a6ee73210096c1e363977ef0568675187</id>
<content type='text'>
Change aritmentics to use 64bit types to be compatible with 64bit
builds.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: optimize interrupt loop</title>
<updated>2015-04-14T03:48:12Z</updated>
<author>
<name>Marek Szyprowski</name>
<email>m.szyprowski@samsung.com</email>
</author>
<published>2015-03-03T16:32:12Z</published>
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<id>urn:sha1:137f7c590d37279f49caf4d3152a0a7d12f01831</id>
<content type='text'>
There is no point in calling dwc3_thread_interrupt() if no event is
pending. There is also no point in flushing event cache in EVERY loop
iteration.

Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: make dwc3_set_mode to static</title>
<updated>2015-04-14T03:48:12Z</updated>
<author>
<name>Joonyoung Shim</name>
<email>jy0922.shim@samsung.com</email>
</author>
<published>2015-03-03T16:32:09Z</published>
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<id>urn:sha1:7e9cb7962f401439c9f107878100810b138f6ab9</id>
<content type='text'>
This commit makes the dwc3_set_mode() as static, to prevent collisions.

Signed-off-by: Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;
Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>dwc3: flush the buffers before using it</title>
<updated>2015-04-14T03:48:10Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2015-02-23T13:10:13Z</published>
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<id>urn:sha1:526a50f8ec300194aa168e07d7dee6f32902d06d</id>
<content type='text'>
In the linux kernel, non cacheable buffers are used. However in uboot
since there are no APIs to allocate non cacheable memory, all
the buffers should be flushed before using it.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>dwc3: core: added an API to invoke irq handlers</title>
<updated>2015-04-14T03:48:10Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2015-02-23T13:10:06Z</published>
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<id>urn:sha1:27d3b89d3362c912dccf1d9d27bcefc1e361fe19</id>
<content type='text'>
Since interrupt support is not present in u-boot, added an
API to handle the interrupts in dwc3 core. This API can be
polled to handle the interrupts.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Reviewed-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>dwc3: core: add support for multiple dwc3 controllers</title>
<updated>2015-04-14T03:48:10Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2015-02-23T13:10:05Z</published>
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<id>urn:sha1:793d347f5372edd4e5b6353df49fac77ce54031c</id>
<content type='text'>
Added support for multiple dwc3 controllers. This gives uboot
the capability to control multiple dwc3 controllers.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Reviewed-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>dwc3: core: change probe and remove to uboot init and uboot exit code</title>
<updated>2015-04-14T03:48:09Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2015-02-23T13:10:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8e1906a81f9e98ed538da393e839d6784b8b87fd'/>
<id>urn:sha1:8e1906a81f9e98ed538da393e839d6784b8b87fd</id>
<content type='text'>
Removed probe and remove that are specific to linux and replaced it with
uboot init and uboot exit. These functions will be invoked from boardfile.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Reviewed-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: core: make dwc3 core build in uboot</title>
<updated>2015-04-14T03:48:09Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2015-02-23T13:10:02Z</published>
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<id>urn:sha1:71744d0d06fd078207c527f362fcc66c93228d36</id>
<content type='text'>
*) Changed the include header files to that used in u-boot.
*) Removed phy_* APIs
*) Removed jiffies and used a simple while loop
*) Used dma_alloc_coherent and dma_free_coherent APIs of u-boot
*) Fixed other misc warnings

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Reviewed-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
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