<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/usb/dwc3, branch v2015.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/usb/dwc3?h=v2015.07</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/usb/dwc3?h=v2015.07'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2015-06-08T13:25:44Z</updated>
<entry>
<title>samsung: usb: phy: Support for DWC3 PHY</title>
<updated>2015-06-08T13:25:44Z</updated>
<author>
<name>Lukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2015-05-22T16:14:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a272c99d30000e5daadcf20a22df27f98ac215dd'/>
<id>urn:sha1:a272c99d30000e5daadcf20a22df27f98ac215dd</id>
<content type='text'>
New files, namely samsung_usb_phy.c and samsung-usb-phy-uboot.h have
been added to u-boot to provide proper PHY handling at Exynos5 SoCs.

This code is used thereafter in the board_usb_init() call.

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: Correct clean up code for requests</title>
<updated>2015-04-14T03:48:12Z</updated>
<author>
<name>Lukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2015-03-03T16:32:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3621b3b8a71699728c45920d7019d6da0adb034b'/>
<id>urn:sha1:3621b3b8a71699728c45920d7019d6da0adb034b</id>
<content type='text'>
For u-boot dwc3 driver the scatter gather list support has been removed
from original linux code. It is correct, since we try to send one request
at a time.
However, the cleanup left spurious break, which caused early exit from
loop at dwc3_cleanup_done_reqs() function. As a result the dwc3_gadget_giveback()
wasn't called and caused USB Mass Storage to hang.

This commit removes this problem and refactor the code to remove superfluous
do { } while(1) loop.

Test HW: Odroid XU3 (with ./test/ums/ums_gadget_test.sh)

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: gadget: Set non EP0 max packet limit to 512B</title>
<updated>2015-04-14T03:48:12Z</updated>
<author>
<name>Lukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2015-03-03T16:32:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=afa093bfa782f1cc8fc1bf4df01841e3167df9b1'/>
<id>urn:sha1:afa093bfa782f1cc8fc1bf4df01841e3167df9b1</id>
<content type='text'>
Commit "drivers/dwc3: add a workaround for too small OUT requests"
sets max packet for OUT requests when transfer is smaller.

Until this change the default maxpacket for non EP0 EPs was 1024. This is
too much, since UMS LBA size is 512B

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: gadget: Set all ctrl fields of Transfer Control Blocks (TRB) to be LST</title>
<updated>2015-04-14T03:48:12Z</updated>
<author>
<name>Lukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2015-03-03T16:32:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=29e7fc19ceda9d93fba21a35990e2eb157901010'/>
<id>urn:sha1:29e7fc19ceda9d93fba21a35990e2eb157901010</id>
<content type='text'>
It turned out that current dwc3 gadget code is preparing multiple TRBs
for a transfer. Unfortunately, when multiple requests are in the same
queue, only for the last one the LST (last) ctrl bit is set.

Due to that dwc3 HW executes all TRBs up till the one marked as last.
Unfortunately, UMS requires call of -&gt;complete callback after any send TRB.
This is the reason for "hangs" in executing UMS.

This code simplifies this situation and set each TRB's ctrl field bit to be
last (LST bit).

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: optimize interrupt loop</title>
<updated>2015-04-14T03:48:12Z</updated>
<author>
<name>Marek Szyprowski</name>
<email>m.szyprowski@samsung.com</email>
</author>
<published>2015-03-03T16:32:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=137f7c590d37279f49caf4d3152a0a7d12f01831'/>
<id>urn:sha1:137f7c590d37279f49caf4d3152a0a7d12f01831</id>
<content type='text'>
There is no point in calling dwc3_thread_interrupt() if no event is
pending. There is also no point in flushing event cache in EVERY loop
iteration.

Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: add a workaround for too small OUT requests</title>
<updated>2015-04-14T03:48:12Z</updated>
<author>
<name>Marek Szyprowski</name>
<email>m.szyprowski@samsung.com</email>
</author>
<published>2015-03-03T16:32:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5dc4538bf3fea0baf4ca2e4191e0e62991fbd779'/>
<id>urn:sha1:5dc4538bf3fea0baf4ca2e4191e0e62991fbd779</id>
<content type='text'>
DWC3 hangs on OUT requests smaller than maxpacket size,
so HACK the request length to be at least equal to maxpacket size.

Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: make dwc3_set_mode to static</title>
<updated>2015-04-14T03:48:12Z</updated>
<author>
<name>Joonyoung Shim</name>
<email>jy0922.shim@samsung.com</email>
</author>
<published>2015-03-03T16:32:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7e9cb7962f401439c9f107878100810b138f6ab9'/>
<id>urn:sha1:7e9cb7962f401439c9f107878100810b138f6ab9</id>
<content type='text'>
This commit makes the dwc3_set_mode() as static, to prevent collisions.

Signed-off-by: Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;
Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: Remove BIT(x) macro from DWC3's gadget code</title>
<updated>2015-04-14T03:48:12Z</updated>
<author>
<name>Lukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2015-03-03T16:32:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2252d150efac460dc2494a4a12505d366e645232'/>
<id>urn:sha1:2252d150efac460dc2494a4a12505d366e645232</id>
<content type='text'>
The BIT() macro is used only in those places, so it is reasonable to
replace it by a constant value.

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: Makefile: Make dwc3 driver compile in u-boot</title>
<updated>2015-04-14T03:48:10Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2015-02-23T13:10:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5b9ce0e28a5262ff7b8fca98b888669881174bf9'/>
<id>urn:sha1:5b9ce0e28a5262ff7b8fca98b888669881174bf9</id>
<content type='text'>
Now that the entire dwc3 driver is adapted to compile with uboot build,
modify the Makefiles so that the dwc3 driver can be built.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Reviewed-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: Add chained TRB support for ep0</title>
<updated>2015-04-14T03:48:10Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2015-02-23T13:10:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8d488f3e16f1a7f2b6b3d1f8420b0871123e56f8'/>
<id>urn:sha1:8d488f3e16f1a7f2b6b3d1f8420b0871123e56f8</id>
<content type='text'>
dwc3 can do only max packet aligned transfers. So in case request length
is not max packet aligned and is bigger than DWC3_EP0_BOUNCE_SIZE
two chained TRBs is required to handle the transfer.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Reviewed-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
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