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<title>u-boot.git/drivers/usb/dwc3, branch v2020.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/usb/dwc3?h=v2020.04</id>
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<updated>2020-02-19T13:27:30Z</updated>
<entry>
<title>dma-mapping: move dma_map_(un)single() to &lt;linux/dma-mapping.h&gt;</title>
<updated>2020-02-19T13:27:30Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2020-02-14T07:40:19Z</published>
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<id>urn:sha1:9d86b89c590832c9bcb1c69d5ccdecdf731f97ae</id>
<content type='text'>
The implementation of dma_map_single() and dma_unmap_single() is
exactly the same for all the architectures that support them.

Factor them out to &lt;linux/dma-mapping.h&gt;, and make all drivers to
include &lt;linux/dma-mapping.h&gt; instead of &lt;asm/dma-mapping.h&gt;.

If we need to differentiate them for some architectures, we can
move the generic definitions to &lt;asm-generic/dma-mapping.h&gt;.

Add some comments to the helpers. The concept is quite similar to
the DMA-API of Linux kernel. Drivers are agnostic about what is
going on behind the scene. Just call dma_map_single() before the
DMA, and dma_unmap_single() after it.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>dma-mapping: fix the prototype of dma_unmap_single()</title>
<updated>2020-02-19T13:27:30Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2020-02-14T07:40:18Z</published>
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<id>urn:sha1:950c5968672a22a65790534234d1106bd1303652</id>
<content type='text'>
dma_unmap_single() takes the dma address, not virtual address.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>dm: core: Create a new header file for 'compat' features</title>
<updated>2020-02-06T02:33:46Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-02-03T14:36:16Z</published>
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<id>urn:sha1:336d4615f8fa774557d14f9b3245daa9e5fe3dbc</id>
<content type='text'>
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: core: Require users of devres to include the header</title>
<updated>2020-02-06T02:33:46Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-02-03T14:36:15Z</published>
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<id>urn:sha1:61b29b82683863a970fd4609a7c58512872616bc</id>
<content type='text'>
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</content>
</entry>
<entry>
<title>dwc3-generic: Add support for AM654 USB controller</title>
<updated>2020-01-20T04:40:29Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2019-12-09T05:07:29Z</published>
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<id>urn:sha1:cab4e275dd148a5bf6fe53933314e6732309ad2a</id>
<content type='text'>
AM654 has DWC3 USB controller that is very similar to other TI SoCs. Add
a new compatible to enable the same.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: Fix UTMI/UTMIW phy interface initialization</title>
<updated>2019-12-21T19:35:16Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2019-12-18T07:30:02Z</published>
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<id>urn:sha1:5c207282f53f86ecbf8c25cb691030d8c643ba1c</id>
<content type='text'>
DWC3 support phy interfaces like 8/16-bit UTMI+. phy interface
initialization code would handle them properly along with UNKNOWN
type by default if none of the user/board doesn't need to use the
phy interfaces at all.

The current code is masking the 8/16-bit UTMI+ interface bits globally
which indeed effect the UNKNOWN cases, therefore it effects the platforms
which are not using phy interfaces at all.

So, handle the phy masking bits accordingly on respective interface
type cases.

Fixes: 6b7ebff00190 ("usb: dwc3: Add phy interface for dwc3_uboot")
Reported-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
</entry>
<entry>
<title>common: Move ARM cache operations out of common.h</title>
<updated>2019-12-02T23:24:58Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-11-14T19:57:39Z</published>
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<id>urn:sha1:1eb69ae498567bb0b62ee554647204e8245cdacc</id>
<content type='text'>
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: Add phy interface for dwc3_uboot</title>
<updated>2019-11-23T14:29:49Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2019-11-19T08:26:20Z</published>
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<id>urn:sha1:6b7ebff00190649d2136b34f6feebc0dbe85bfdc</id>
<content type='text'>
U-Boot has two different variants of dwc3 initializations,
- with dm variant gadget, so the respective dm driver would
  call the dwc3_init in core.
- with non-dm variant gadget, so the usage board file would
  call dwc3_uboot_init in core.

The driver probe would handle all respective gadget properties
including phy interface via phy_type property and then trigger
dwc3_init for dm-variant gadgets.

So, to support the phy interface for non-dm variant gadgets,
the better option is dwc3_uboot_init since there is no
dedicated controller for non-dm variant gadgets.

This patch support for adding phy interface like 8/16-bit UTMI+
code for dwc3_uboot.

This change used Linux phy.h enum list, to make proper code
compatibility.

Cc: Marek Vasut &lt;marex@denx.de&gt;
Tested-by: Levin Du &lt;djw@t-chip.com.cn&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>dwc3: flush cache only if there is a buffer attached to a request</title>
<updated>2019-10-31T11:12:31Z</updated>
<author>
<name>Marek Szyprowski</name>
<email>m.szyprowski@samsung.com</email>
</author>
<published>2019-10-02T12:19:14Z</published>
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<id>urn:sha1:fd15b58c1a9a61edcdeef8ce1eb4df2442295f58</id>
<content type='text'>
Calling cache flush on invalid buffer, even with zero length might cause
an exception on certain platforms.

Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
</content>
</entry>
<entry>
<title>dwc3-generic: Don't fail probe if clk/reset entries are absent</title>
<updated>2019-10-31T11:11:24Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2019-10-25T08:18:05Z</published>
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<id>urn:sha1:d624434f5ebc5e3eb5f5609f06200f477cf8d8b5</id>
<content type='text'>
Some boards don't populate clk/reset entries as these are are optional
as per binding documentation. Therefore, don't fail driver probe if
clk/reset entries are absent in DT.

This fixes fastboot failures seen due to enabling of CONFIG_CLK on AM57xx

Fixes: e8e683d33b0c ("board: ti: am57xx-idk: Configure the CDCE913 clock synthesizer")
Reported-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
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