<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/usb/dwc3, branch v2025.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/usb/dwc3?h=v2025.04</id>
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<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2025-03-21T08:37:40Z</updated>
<entry>
<title>usb: dwc3: gadget: Fix match_ep callback for NXP UUU tool</title>
<updated>2025-03-21T08:37:40Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2025-03-19T22:07:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0916053ebc566245b06d0a179533f6622b6ad392'/>
<id>urn:sha1:0916053ebc566245b06d0a179533f6622b6ad392</id>
<content type='text'>
The UUU tool excepts the interrupt-in endpoint to be ep1in, otherwise
it crashes. This is a result of the previous hard-coded EP setup in
drivers/usb/gadget/epautoconf.c which did special-case EP allocation
for SPL builds, and which was since converted to this callback, but
without the special-case EP allocation in SPL part.

This reinstates the SPL part in an isolated manner, only for NXP iMX
SoCs, only for SPL builds, and only for the ep1in interrupt-in endpoint.

Fixes: 1918b8010c32 ("usb: dwc3: gadget: Convert epautoconf workaround to match_ep callback")
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
Link: https://lore.kernel.org/r/20250319220805.219001-1-marex@denx.de
Signed-off-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3-generic: Add STih407 support</title>
<updated>2025-02-11T08:00:42Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@foss.st.com</email>
</author>
<published>2025-01-30T16:35:43Z</published>
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<id>urn:sha1:23542078ec9a49cfb35cc00a6715106afbf65627</id>
<content type='text'>
Add STi glue logic to manage the DWC3 HC on STiH407
SoC family. It configures the internal glue logic and
syscfg registers.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
Link: https://lore.kernel.org/r/20250130163547.512990-6-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3-generic: Reorder include</title>
<updated>2025-02-11T08:00:42Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@foss.st.com</email>
</author>
<published>2025-01-30T16:35:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9de4b7e0a4c93128f28b19ad8a3a82421275418f'/>
<id>urn:sha1:9de4b7e0a4c93128f28b19ad8a3a82421275418f</id>
<content type='text'>
Reorder include following rules available here :
https://docs.u-boot.org/en/latest/develop/codingstyle.html#include-files

Remove useless include files.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
Reviewed-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Link: https://lore.kernel.org/r/20250130163547.512990-5-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3-generic: set "mode" based on caller of dwc3_generic_probe()</title>
<updated>2024-12-13T20:14:25Z</updated>
<author>
<name>Siddharth Vadapalli</name>
<email>s-vadapalli@ti.com</email>
</author>
<published>2024-11-26T12:03:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7af18fc5ed6f412a3692f33e317e9ecbdc7b5a14'/>
<id>urn:sha1:7af18fc5ed6f412a3692f33e317e9ecbdc7b5a14</id>
<content type='text'>
There are only two callers of "dwc3_generic_probe()", namely:
1. dwc3_generic_peripheral_probe()
2. dwc3_generic_host_probe()
Currently, the "mode" is set based on the device-tree node of the
platform device. Also, the DWC3 core doesn't support updating the "mode"
dynamically at runtime if it is set to "OTG", i.e. "OTG" is treated as a
separate mode in itself, rather than being treated as a mode which should
eventually lead to "host"/"peripheral".

Given that the callers of "dwc3_generic_probe()" clarify the expected
"mode" of the USB Controller, use that "mode" instead of the one
specified in the device-tree. This shall allow the USB Controller to
function both as a "Host" and as a "Peripheral" when the "mode" is "otg"
in the device-tree, based on the caller of "dwc3_generic_probe()".

Signed-off-by: Siddharth Vadapalli &lt;s-vadapalli@ti.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Roger Quadros &lt;rogerq@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-dfu-20241017' of https://source.denx.de/u-boot/custodians/u-boot-dfu</title>
<updated>2024-10-17T14:34:01Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-17T14:34:01Z</published>
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<id>urn:sha1:d17661a5ff394f7552ab7ebd186581e90ca552be</id>
<content type='text'>
u-boot-dfu-20241017

CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/22742

Usb Gadget:
- Fix cdns3 endpoint configuration by setting maxpacket
- Fix dwc3 cache handling when using DMA

Fastboot:
- Make AVB_VERIFY depends on FASTBOOT
</content>
</entry>
<entry>
<title>usb: dwc3: invalidate dcache on buffer used in interrupt handling</title>
<updated>2024-10-15T09:03:57Z</updated>
<author>
<name>Neil Armstrong</name>
<email>neil.armstrong@linaro.org</email>
</author>
<published>2024-10-11T14:38:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3e47302dd71267b85e5ec65c5b6d881c23cce6cb'/>
<id>urn:sha1:3e47302dd71267b85e5ec65c5b6d881c23cce6cb</id>
<content type='text'>
On Qualcomm systems, the setup buffer and even buffers are in
a bad state at interrupt handling, so invalidate the dcache lines
for the setup_buf and event buffer to make sure we read correct
data written by the hardware.

This fixes the following error:
dwc3-generic-peripheral usb@a600000: UNKNOWN IRQ type -1
dwc3-generic-peripheral usb@a600000: UNKNOWN IRQ type 4673109

and invalid situation in dwc3_gadget_giveback() because setup_buf content
is read at 0s and leads to fatal crash fixed by [1].

[1] https://lore.kernel.org/all/20240528-topic-sm8x50-dwc3-gadget-crash-fix-v1-1-58434ab4b3d3@linaro.org/

Reviewed-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Link: https://lore.kernel.org/r/20241011-u-boot-dwc3-gadget-dcache-fixup-v4-3-5f3498d8035b@linaro.org
Signed-off-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: fix dcache flush range calculation</title>
<updated>2024-10-15T09:03:57Z</updated>
<author>
<name>Neil Armstrong</name>
<email>neil.armstrong@linaro.org</email>
</author>
<published>2024-10-11T14:38:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=502a50ab1f7e32e3e90056597e8ce6a0931789ba'/>
<id>urn:sha1:502a50ab1f7e32e3e90056597e8ce6a0931789ba</id>
<content type='text'>
The current flush operation will omit doing a flush/invalidate on
the first and last bytes if the base address and size are not aligned
with CACHELINE_SIZE.

This causes operation failures Qualcomm platforms.

Take in account the alignment and size of the buffer and also
flush the previous and last cacheline.

Reviewed-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Link: https://lore.kernel.org/r/20241011-u-boot-dwc3-gadget-dcache-fixup-v4-2-5f3498d8035b@linaro.org
Signed-off-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc3: allocate setup_buf with dma_alloc_coherent()</title>
<updated>2024-10-15T09:03:56Z</updated>
<author>
<name>Neil Armstrong</name>
<email>neil.armstrong@linaro.org</email>
</author>
<published>2024-10-11T14:38:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1f12fc7e3350b179d17efaf5ba00fc3683cf33ec'/>
<id>urn:sha1:1f12fc7e3350b179d17efaf5ba00fc3683cf33ec</id>
<content type='text'>
Since setup_buf is also consumed by hardware DMA, aligns it's
allocation like other hardware buffers by introduce setup_buf_addr
populated by dma_alloc_coherent(), and use it to pass the physical
address of the buffer to the hardware.

Reviewed-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://lore.kernel.org/r/20241011-u-boot-dwc3-gadget-dcache-fixup-v4-1-5f3498d8035b@linaro.org
Signed-off-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"</title>
<updated>2024-10-11T18:23:25Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-11T18:23:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=47e544f576699ca4630e20448db6a05178960697'/>
<id>urn:sha1:47e544f576699ca4630e20448db6a05178960697</id>
<content type='text'>
Simon Glass &lt;sjg@chromium.org&gt; says:

When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL

Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.

For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:

   #if defined(CONFIG_SPL_BUILD) &amp;&amp; !defined(CONFIG_TPL_BUILD)

In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.

This series starts a change in terminology and usage to resolve the
above issues:

- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
  'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
  defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_

It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.

This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.

The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
</content>
</entry>
<entry>
<title>global: Rename SPL_ to XPL_</title>
<updated>2024-10-11T17:44:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c46760d5967d12b6f7d37402878d1607a98b2b84'/>
<id>urn:sha1:c46760d5967d12b6f7d37402878d1607a98b2b84</id>
<content type='text'>
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
</feed>
