Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so
remove associated code. It will still be possible to restore it later from the
Git history if necessary.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>

Use the ability to have several active EHCI controller on a system
in the PCI EHCI controller implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>

The interrupt endpoint handling code stores the buffer pointer in the QH
padding field. We need to make it the size of a pointer to avoid strict
aliasing issue with the compiler.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>

Interrupt transfers aren't meant to be used from the async list
(the EHCI spec indicates trouble with low/full-speed intr on async).

Build a periodic list instead, and provide an API to make use of it.
Then, use that API from the existing interrupt transfer API.

This provides support for USB keyboards using EHCI.

Use timeouts to ensure we cannot get stuck in the keyboard scanning
if something wrong happens (USB device unplugged or fatal I/O error)

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Julius Werner <jwerner@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>

Enabling the non-dt path for the driver so that
we don't get any build errors for non-dt configuration.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>

With current FDT support driver tries to parse device node
twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't
happen ideally.
Making provision to store data in a global structure and thereby
passing its pointer when needed.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>

Add EHCI support for spear boards

Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>

On EHCI controller with 64-bit address space support, we must initialize
properly the high word for the PCI bus master accesses.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>

Instead of hardcoding the PCI IDs on the USB controller, use the PCI
class to detect them.

Ensure the busmaster bit is properly set in the PCI configuration.

Signed-off-by: Simon Glass <sjg@chromium.org>