Rather than keeping the asynchronous schedule running always, keep it
running only across USB mass storage transfers for now, as it seems
that keeping it running all the time interferes with certain control
transfers during device enumeration.

Note that running the async schedule all the time should not be an
issue, especially on EHCI HCD, as that one implements most of the
transfers using async schedule.

Note that we have usb_disable_asynch(), which however is utterly broken.
The usb_disable_asynch() blocks the USB core from doing async transfers
by setting a global flag. The async schedule should however be disabled
per USB controller. Moreover, setting a global flag does not prevent the
controller from using the async schedule, which e.g. the EHCI HCD does.

This patch implements additional callback to the controller, which
permits it to lock the async schedule and keep it running across
multiple transfers. Once the schedule is unlocked, it must also be
disabled. This thus prevents the async schedule from running outside
of the USB mass storage transfers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> [omap3_beagle, previously failing]

At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>

At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>

These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

The xHCI 1.1 version also need set Transfer Type field

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Profiling the EHCI driver shows a significant performance problem in
ehci_submit_async(). Specifically, this function keeps enabling and
disabling async schedule back and forth for every single transaction.
However, enabling/disabling the async schedule does not take effect
immediatelly, but instead may take up to 1 mS (8 uFrames) to complete.

This impacts USB storage significantly, esp. since the recent reduction
of maximum transfer size to support more USB storage devices. This in
turn results in sharp increase in the number of ehci_submit_async()
calls. Since one USB storage BBB transfer does three such calls and
the maximum transfer size is 120 kiB, the overhead is 6 mS per 120 kiB,
which is unacceptable.

However, this overhead can be removed simply by keeping the async
schedule running. Specifically, the first transfer starts the async
schedule and then each and every subsequent transfer only adds a new
QH into that schedule, waits until the QH is completed and does NOT
disable the async schedule. The async schedule is stopped only by
shutting down the controller, which must happen before moving out
of U-Boot, otherwise the controller will corrupt memory.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>

The ULP has two USB controllers. These two controllers have similar NC
registers layout as i.MX7D. But OTG0 uses UTMI PHY simliar as i.MX6, not
the integrated PHY on i.MX7D. The OTG1 needs off-chip HSIC PHY or ULPI PHY
to work.

This patch only supports OTG0 with UTMI PHY.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>

This fixes the issues with calculation of controller indexes in
ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
placed next to each other, and their addresses incremented by 0x10000.

Example of USB nodes for iMX7S/D:

usbotg1: usb@30b10000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b10000 0x200>;
           ^^^^^^^^^^
....
usbotg2: usb@30b20000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b20000 0x200>;
           ^^^^^^^^^^
....

usbh: usb@30b30000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b30000 0x200>;
           ^^^^^^^^^^
....

Which was leading to usb enumeration issues:
Colibri iMX7 # usb start
starting USB...
Bus usb@30b10000: USB EHCI 1.00
Bus usb@30b20000: probe failed, error -22
scanning bus usb@30b10000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Fixes: 501547cec1("usb: ehci-mx6: Fix bus enumeration for DM case")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>

The xhci.h header file is currently located under drivers/usb/xhci
Move it to the include/usb folder to make it available to drivers that
are not under drivers/usb/xhci

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>

This driver is not used anymore.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>