u-boot.git/drivers/usb, branch v2012.07

smsc95xx: align buffers to cache line size

2012-07-18T12:43:42+00:00

Align buffers passed to the USB code to cache line size so
they can be DMAed safely.

Signed-off-by: Ilya Yanok

ehci-hcd: change debug() to printf() in case of errors

2012-07-18T12:43:42+00:00

Printing message could be useful if something goes really wrong.

Signed-off-by: Ilya Yanok

ehci-hcd: fix external buffer cache handling

2012-07-18T12:43:42+00:00

Buffer coming from upper layers should be cacheline aligned/padded
to perform safe cache operations. For now we don't do bounce
buffering so getting unaligned buffer is an upper layer error.
We can't check if the buffer is properly padded with current
interface so just assume it is (consider changing with in the
future). The following changes are done:

1. Remove useless length alignment check. We get actual transfer
length not the size of the underlying buffer so it's perfectly
valid for it to be unaligned.
2. Move flush_dcache_range() out of while loop or it will
flush too much.
3. Don't try to fix buffer address before calling invalidate:
if it's unaligned it's an error anyway so let cache subsystem
cry about that.
4. Fix end buffer address to be cacheline aligned assuming upper
layer reserved enough space. This is potentially dangerous
operation so upper layers should be careful about that.

Signed-off-by: Ilya Yanok

ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment

2012-07-18T12:43:29+00:00

The USB spec says that 32 bytes is the minimum required alignment.
However on some platforms we have a larger minimum requirement for cache
coherency.  In those cases, use that value rather than the USB spec
minimum.  We add a cpp check to  to define USB_DMA_MINALIGN and
make use of it in ehci-hcd.c and musb_core.h.  We cannot use MAX() here
as we are not allowed to have tests inside of align(...).

Signed-off-by: Tom Rini 
[marek.vasut]: introduce some crazy macro voodoo
Signed-off-by: Marek Vasut 
[ilya.yanok]: moved external buffer fixes to separate patch,
we use {ALLOC,DEFINE}_ALIGN_BUFFER macros with alignment of USB_DMA_MINALIGN
for qh_list, qh and qtd structures to make sure they are proper aligned
for both controller and cache operations.
Signed-off-by: Ilya Yanok

ehci-hcd: program asynclistaddr before every transfer

2012-07-18T12:43:29+00:00

Move or_asynclistaddr programming to ehci_submit_async()
function to make sure queue head is properly programmed
before every transfer. This solves the problem with changing
qh address.

Also remove unneeded qh_list->qh_link reprogramming at the
end of transfer.

Signed-off-by: Ilya Yanok

ehci-omap: Do not call dcache_off from omap_ehci_hcd_init

2012-07-18T12:43:14+00:00

This has never been completely sufficient and now happens too late to
paper over the cache coherency problems with the current USB stack.

Cc: Marek Vasut 
Signed-off-by: Tom Rini 
Signed-off-by: Ilya Yanok

Merge branch 'master' of git://git.denx.de/u-boot-arm

2012-07-10T06:54:41+00:00

* 'master' of git://git.denx.de/u-boot-arm:
  tegra: define fdt_load/fdt_high variables
  tegra: enable bootz command
  tegra: usb: Fix device enumeration problem of USB1
  tegra: trimslice: set up serial flash pinmux
  tegra: add pin_mux_spi() board initialization function
  tegra: add GMC/GMD funcmux entry for SFLASH
  tegra: bootcmd: start USB only when needed
  tegra: bootcmd enhancements
  tegra: add enterrcm command
  tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG
  Add env vars describing U-Boot target board
  tegra: usb: fix wrong error check
  tegra: add ULPI on USB2 funcmux entry
  tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches
  tegra: Add Tamonten Evaluation Carrier support
  tegra: Use SD write-protect GPIO on Tamonten
  tegra: Implement gpio_early_init() on Tamonten
  tegra: Allow boards to perform early GPIO setup
  tegra: plutux: Add device tree support
  tegra: medcom: Add device tree support
  tegra: Rework Tamonten support
  beagle: add eeprom expansion board info for bct brettl4

Signed-off-by: Wolfgang Denk

tegra: usb: Fix device enumeration problem of USB1

2012-07-09T20:44:34+00:00

A known hardware issue of USB1 port where bit 1 (connect status
change) of PORTSC register will be set after issuing Port Reset
(like "usb reset" in u-boot command line).
This will be treated as an error and stops later device enumeration.

Therefore we clear that bit after Port Reset in order to proceed
later device enumeration.

Signed-off-by: Jim Lin 
Acked-by: Stephen Warren 
Signed-off-by: Tom Warren

EXYNOS: Add power Enable/Disable for USB-EHCI

2012-07-09T16:27:55+00:00

This patch adds functions to enable/disable the power of USB
host controller for EXYNOS5.

Signed-off-by: Vivek Gautam 
Signed-off-by: Che-Liang Chiou 
Signed-off-by: Rajeshwari Shinde

USB: EXYNOS: Set USB 2.0 HOST Link mode

2012-07-09T16:27:55+00:00

This patch adds a function to set usb host mode to USB 2.0 HOST Link
for EXYNOS5

Signed-off-by: Rajeshwari Shinde