u-boot.git/drivers/usb, branch v2021.01 Unnamed repository; edit this file 'description' to name the repository. cosmetic: fix typo in drivers/usb/Kconfig 2021-01-04T14:10:17+00:00 Marc Ferland ferlandm@amotus.ca 2020-12-23T15:13:22+00:00 acff02c6dd05740ba5fbfaa6e2dd87c01b5c3257 This commit fixes a simple typo: sPL --> SPL. Signed-off-by: Marc Ferland <ferlandm@amotus.ca> 
This commit fixes a simple typo: sPL --> SPL.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Merge branch 'master' of git://git.denx.de/u-boot-usb 2020-12-16T22:43:33+00:00 Tom Rini trini@konsulko.com 2020-12-16T22:43:33+00:00 51f65b506f37252acb3cd4184ef5e1fc20da13a2 - r8152, xhci fixes 
- r8152, xhci fixes
eth/r8152: fix the aggregation issue 2020-12-16T09:27:09+00:00 Hayes Wang hayeswang@realtek.com 2020-12-16T09:03:23+00:00 72294407726e9652f4ab44add3dbd118797683d1 Remove the redundant setting for USB_RX_EARLY_SIZE. Besides, for RTL8153B, it is necessary to notify the hardware of the changes of the aggregation settings. Signed-off-by: Hayes Wang <hayeswang@realtek.com> 
Remove the redundant setting for USB_RX_EARLY_SIZE. Besides, for
RTL8153B, it is necessary to notify the hardware of the changes
of the aggregation settings.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
eth/r8152: free previous memory if r8152_eth_probe fail 2020-12-16T09:27:09+00:00 Hayes Wang hayeswang@realtek.com 2020-12-16T09:03:22+00:00 17d5a461a0da967c511032a160278b0e1d9fd349 The r8152_eth_probe() may allocate a memory for ss->dev_priv. It has to be freed if r8152_eth_probe() fails finally. Signed-off-by: Hayes Wang <hayeswang@realtek.com> 
The r8152_eth_probe() may allocate a memory for ss->dev_priv.
It has to be freed if r8152_eth_probe() fails finally.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
usb: xhci: fix lack of short packet event trb handling 2020-12-16T09:27:09+00:00 Ran Wang ran.wang_1@nxp.com 2020-11-18T07:49:02+00:00 621ed49d3a2ea3c45be1cf774bef48439bd566f3 For bulk IN transfer, the codes will set ISP flag to request event TRB being generated by xHC for the case of short packet. So when encountering buffer-cross-64K-boundary (which we will divide payload and enqueuqe more than 1 transfer TRB), and the first TRB ends up with a short packet condition it will trigger an short packet code transfer event per that flag and cause more than 1 event TRB generated for this transfer. However, current codes will only handle the first transfer event TRB then mark current transfer completed, causing next transfer failure due to event TRB mis-match. Such issue has been observed on some Layerscape platforms (LS1028A, LS1088A, etc) with USB ethernet device. This patch adds a loop to make sure the event TRB for last transfer TRB has been handled in time. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
For bulk IN transfer, the codes will set ISP flag to request event TRB
being generated by xHC for the case of short packet. So when encountering
buffer-cross-64K-boundary (which we will divide payload and enqueuqe
more than 1 transfer TRB), and the first TRB ends up with a short packet
condition it will trigger an short packet code transfer event per that
flag and cause more than 1 event TRB generated for this transfer.

However, current codes will only handle the first transfer event TRB
then mark current transfer completed, causing next transfer
failure due to event TRB mis-match.

Such issue has been observed on some Layerscape platforms (LS1028A,
LS1088A, etc) with USB ethernet device.

This patch adds a loop to make sure the event TRB for last transfer TRB
has been handled in time.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: edison: Use dwc3-generic driver for Intel Edison 2020-12-16T05:51:24+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2020-12-03T17:45:01+00:00 23cdbba8b199f2f35c28e40dbb59a5e935dbbae9 Use generic Synopsys DesignWare 3 driver on Intel Edison. For now it's just a stub which allows future refactoring. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Use generic Synopsys DesignWare 3 driver on Intel Edison.
For now it's just a stub which allows future refactoring.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
usb: dwc3-meson-g12a: always configure dr-mode 2020-12-14T18:58:54+00:00 Marek Szyprowski m.szyprowski@samsung.com 2020-12-14T11:34:19+00:00 5c88b6ad400c42cabd347ad58098b149ede34281 dwc3_meson_g12a_force_mode() sets the dr-mode of the USB PHY. However it skips setting the mode if it matches the one done during driver probe (stored in private structure). This fails if the mode has been changed to other value and then back to initial one. Fix this by configuring the dr-mode always, regadless of the one set at the driver probe). This fixes operation of USB gadget based drivers when they are initialized for the second time. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 
dwc3_meson_g12a_force_mode() sets the dr-mode of the USB PHY. However
it skips setting the mode if it matches the one done during driver probe
(stored in private structure). This fails if the mode has been changed
to other value and then back to initial one. Fix this by configuring the
dr-mode always, regadless of the one set at the driver probe).

This fixes operation of USB gadget based drivers when they are initialized
for the second time.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
treewide: Update email address Patrick Delaunay and Patrice Chotard 2020-12-09T09:57:50+00:00 Patrice Chotard patrice.chotard@foss.st.com 2020-12-02T17:47:30+00:00 0f8106f8e0c03839b371eaee1d7459b810d569ec Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> 
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
usb: gadget: dwc2_udc_otg: return zero when reset property is not present 2020-11-22T12:18:20+00:00 Jaehoon Chung jh80.chung@samsung.com 2020-10-21T12:28:41+00:00 05dac23261284578ff17952e11340f41127923ac If reset DT property is not present, -ENOENT is returned. But it's not really error. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> 
If reset DT property is not present, -ENOENT is returned.
But it's not really error.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
usb: dwc3: Handle case where setup_phy is not needed 2020-11-22T12:18:20+00:00 Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com 2020-10-21T12:17:31+00:00 e7f9e1fca9b0563e5e83c5d2c5164bdda5948227 If CONFIG_PHY is not enabled then the dwc3_setup_phy() returns ENOTSUPP which can be still valid and intentional so modify error check to handle this -ENOTSUPP. The same error handling exists in drivers/usb/host/xhci-dwc3.c already added by commit d648a50c0a27 ("dwc3: move phy operation to core.c"). Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
If CONFIG_PHY is not enabled then the dwc3_setup_phy()
returns ENOTSUPP which can be still valid and intentional
so modify error check to handle this -ENOTSUPP.

The same error handling exists in drivers/usb/host/xhci-dwc3.c already
added by commit d648a50c0a27 ("dwc3: move phy operation to core.c").

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>